Merge tag 'hppa-a400-updates-pull-request' of https://github.com/hdeller/qemu-hppa into staging

HPPA updates for A400 and new SeaBIOS

A new SeaBIOS-hppa version 26 with many fixes, and some updates
regarding the A400 machine. Main goal is still to get MPE
functional on the A400 machines.

Signed-off-by: Helge Deller <deller@gmx.de>

# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCasAmPAAKCRD3ErUQojoP
# X1bUAQDrSlGqIr70KRE/qnQi4WZBR+ptDit12vBdOWW30M4yNwD/UuThHCESapyl
# 7vTNSeyaw7gSPjjyZ+XZ7jiwFkRHlw0=
# =HAzH
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 02 Oct 2026 11:46:36 PM CEST
# gpg:                using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F
# gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown]
# gpg:                 aka "Helge Deller <deller@kernel.org>" [unknown]
# gpg:                 aka "Helge Deller <deller@debian.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4544 8228 2CD9 10DB EF3D  25F8 3E5F 3D04 A7A2 4603
#      Subkey fingerprint: BCE9 123E 1AD2 9F07 C049  BBDE F712 B510 A23A 0F5F

* tag 'hppa-a400-updates-pull-request' of https://github.com/hdeller/qemu-hppa:
  hw/hppa: Place the CPU at HPA 0xfffa0000 and fw_cfg at 0xfffb0000
  target/hppa: Update SeaBIOS-hppa to version 26
  hw/hppa: Place the second Elroy of the A400 on rope 2
  hw/hppa: Rotate Elroy PCI interrupts by pin on the A400

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

hw/hppa/hppa_hardware.h

@@ -24,13 +24,14 @@
 #define LASI_HPA        0xffd00000
 #define LASI_GFX_HPA    0xf8000000
 #define ARTIST_FB_ADDR  0xf9000000
-#define CPU_HPA         0xfffb0000
+#define CPU_HPA         0xfffa0000      /* as on real Astro based machines */
 #define MEMORY_HPA      0xfffff000
 
 #define IDE_HPA         0xf9000000      /* Boot disc controller */
 #define ASTRO_HPA       0xfed00000
 #define ELROY0_HPA      0xfed30000
 #define ELROY2_HPA      0xfed32000
+#define ELROY4_HPA      0xfed34000      /* second Elroy on A400/A500, rope 2 */
 #define ELROY8_HPA      0xfed38000
 #define ELROYc_HPA      0xfed3c000
 #define ASTRO_MEMORY_HPA 0xfed10200
@@ -47,7 +48,7 @@
 #define PORT_PCI_CMD    hppa_port_pci_cmd
 #define PORT_PCI_DATA   hppa_port_pci_data
 
-#define FW_CFG_IO_BASE  0xfffa0000
+#define FW_CFG_IO_BASE  0xfffb0000
 
 #define PORT_SERIAL1    (LASI_UART_HPA + 0x800)
 #define PORT_SERIAL2    (DINO_UART_HPA + 0x800)

hw/hppa/machine.c

@@ -48,7 +48,7 @@ struct HppaMachineState {
     uint64_t memsplit_addr;
 };
 
-#define MIN_SEABIOS_HPPA_VERSION 22 /* require at least this fw version */
+#define MIN_SEABIOS_HPPA_VERSION 26 /* require at least this fw version */
 
 #define HPA_POWER_BUTTON        (FIRMWARE_END - 0x10)
 static hwaddr soft_power_reg;
@@ -730,7 +730,7 @@ static void machine_HP_B160L_init(MachineState *machine)
     machine_HP_common_init_tail(machine, pci_bus, translate, false);
 }
 
-static AstroState *astro_init(void)
+static AstroState *astro_init(bool is_a400)
 {
     DeviceState *dev;
 
@@ -738,6 +738,10 @@ static AstroState *astro_init(void)
     object_property_set_int(OBJECT(dev), "phys-addr-bits",
                             hppa_phys_addr_bits(&cpu[0]->env),
                             &error_abort);
+    object_property_set_bool(OBJECT(dev), "rotate-pci-pins", is_a400,
+                             &error_abort);
+    object_property_set_bool(OBJECT(dev), "elroy1-on-rope2", is_a400,
+                             &error_abort);
     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 
     return ASTRO_CHIP(dev);
@@ -753,6 +757,8 @@ static void machine_HP_C3700_init(MachineState *machine)
     DeviceState *astro_dev;
     MemoryRegion *addr_space = get_system_memory();
     TranslateFn *translate;
+    MachineClass *mc = MACHINE_GET_CLASS(machine);
+    bool is_C3700 = strcmp(mc->name, "C3700") == 0;
 
     /* Create CPUs and RAM.  */
     translate = machine_HP_common_init_cpus(machine);
@@ -764,7 +770,7 @@ static void machine_HP_C3700_init(MachineState *machine)
     }
 
     /* Init Astro and the Elroys (PCI host bus chips).  */
-    astro = astro_init();
+    astro = astro_init(!is_C3700);
     astro_dev = DEVICE(astro);
     memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA),
                                 sysbus_mmio_get_region(
@@ -773,8 +779,6 @@ static void machine_HP_C3700_init(MachineState *machine)
     assert(pci_bus);
 
     /* The C3700 has a SuperIO chip, while the A400 hasn't. */
-    MachineClass *mc = MACHINE_GET_CLASS(machine);
-    bool is_C3700 = strcmp(mc->name, "C3700") == 0;
     if (is_C3700)  {
         PCIDevice *ide_pdev = pci_create_simple(pci_bus, PCI_DEVFN(2, 0),
                                                 "pc87560-ide");

hw/pci-host/astro.c

@@ -41,6 +41,23 @@ static const int elroy_hpa_offsets[ELROY_NUM] = {
 static const char elroy_rope_nr[ELROY_NUM] = {
             0, 1, 4, 6 }; /* busnum path, e.g. [10:6] */
 
+/* On the A400 the second Elroy is connected to rope 2 */
+static int astro_elroy_hpa_offset(AstroState *s, int i)
+{
+    if (i == 1 && s->elroy1_on_rope2) {
+        return ELROY4_HPA - ASTRO_HPA;
+    }
+    return elroy_hpa_offsets[i];
+}
+
+static int astro_elroy_rope_nr(AstroState *s, int i)
+{
+    if (i == 1 && s->elroy1_on_rope2) {
+        return 2;
+    }
+    return elroy_rope_nr[i];
+}
+
 /* Astro version numbers */
 enum { ID_ASTRO_1_0 = 0, ID_ASTRO_2_1 = 9, ID_ASTRO_3_0 = 2 };
 
@@ -406,9 +423,14 @@ static void elroy_set_irq(void *opaque, int irq, int level)
 
 static int elroy_pci_map_irq(PCIDevice *d, int irq_num)
 {
+    ElroyState *s = pci_get_bus(d)->irq_opaque;
     int slot = PCI_SLOT(d->devfn);
 
     assert(irq_num >= 0 && irq_num < ELROY_IRQS);
+    /* INTB..INTD of a slot may be rotated to the following inputs */
+    if (s->astro && s->astro->rotate_pci_pins) {
+        return (slot + irq_num) & (ELROY_IRQS - 1);
+    }
     return slot & (ELROY_IRQS - 1);
 }
 
@@ -584,7 +606,7 @@ static void adjust_LMMIO_mapping(AstroState *s)
 
         elroy = s->elroy[i];
         alias = &elroy->lmmio_alias;
-        rope = elroy_rope_nr[i];
+        rope = astro_elroy_rope_nr(s, i);
         if (alias->enabled) {
             memory_region_set_enabled(alias, false);
         }
@@ -710,7 +732,7 @@ static void adjust_GMMIO_mapping(AstroState *s)
 
         elroy = s->elroy[i];
         alias = &elroy->gmmio_alias;
-        rope = elroy_rope_nr[i];
+        rope = astro_elroy_rope_nr(s, i);
         if (alias->enabled) {
             memory_region_set_enabled(alias, false);
         }
@@ -1012,8 +1034,8 @@ static void astro_realize(DeviceState *obj, Error **errp)
         uint64_t map_size;
         int rope;
 
-        addr_offset = elroy_hpa_offsets[i];
-        rope = elroy_rope_nr[i];
+        addr_offset = astro_elroy_hpa_offset(s, i);
+        rope = astro_elroy_rope_nr(s, i);
 
         elroy = elroy_init(i);
         s->elroy[i] = elroy;
@@ -1064,6 +1086,8 @@ static void astro_realize(DeviceState *obj, Error **errp)
 
 static const Property astro_props[] = {
     DEFINE_PROP_UINT8("phys-addr-bits", AstroState, phys_addr_bits, 32),
+    DEFINE_PROP_BOOL("rotate-pci-pins", AstroState, rotate_pci_pins, false),
+    DEFINE_PROP_BOOL("elroy1-on-rope2", AstroState, elroy1_on_rope2, false),
 };
 
 static void astro_class_init(ObjectClass *klass, const void *data)

include/hw/pci-host/astro.h

@@ -84,6 +84,8 @@ struct AstroState {
     uint64_t tlb_pdir_base;
 
     uint8_t phys_addr_bits;
+    bool rotate_pci_pins;       /* PCI INTx pin rotation (A400) */
+    bool elroy1_on_rope2;       /* second Elroy on rope 2 (A400) */
 
     struct ElroyState *elroy[ELROY_NUM];