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Author SHA1 Message Date
Alex Rønne Petersen 1e440e14ef update_cpu_feature: replace generic aarch64 model with architecture level models 
And use armv8a as the generic model.

The old generic model was incoherent; it didn't even have v8a.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen f4fd2f30d0 update_cpu_features: tweak generic csky model 
A truly generic model is not possible for csky, but with this weak, it covers
148 of 151 models. I think that's Good Enough.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 25017aa872 update_cpu_features: remove generic mips model 
We weren't using it for anything and it certainly wasn't "generic".
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 8e553c1691 update_cpu_features: remove generic x86 model 
This model just... didn't make a ton of sense? We also weren't using it for
anything since generic() returns the i86, i386, and x86_64 models.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen cc2431f382 update_cpu_features: remove generic s390x model 
This is just arch8/z10.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 78a614343c update_cpu_features: remove generic hexagon model 
This is just hexagonv60.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 1dd5f188ae update_cpu_features: remove generic sparc model 
This is just v7.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 6ed004cad7 update_cpu_features: remove generic lanai model 
This is just v11.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 2b5270107c update_cpu_features: remove mips float ABI features 
Floating point on this god-forsaken architecture is a disaster without equal.
I'm actually mad at everyone who contributed to this fucking mess.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen dd136e8604 update_cpu_features: clean up mips features a bit 
* Remove codegen options
* Flatten microarchitecture features
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 0d142b9e17 std.Target: remove amdpal and mesa3d OS tags 
* mesa3d is for internal use in Mesa's shader compilation pipeline. This never
  really made sense to have in Zig.
* amdpal is for LLPC, part of AMDVLK, which AMD discontinued development of in
  favor of RADV in 2025.

Follow-up work: Removing the amdgcn_cs calling convention.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 63f374719a update_cpu_features: remove soft_float sparc feature 
LLVM takes this from the target triple, which is what we want.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 18dacc3689 update_cpu_features: remove soft_float arm feature 
LLVM takes this from the target triple, which is what we want.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen d7e6ccac78 update_cpu_features: remove generic and generic-hsa amdgcn models 
These literally don't mean anything.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 46eb8d9dd1 update_cpu_features: refactor amdgcn family features 
The gfx* family features are redundant information. Remove them and replace them
with the gfx*-insts features intead, and add missing dependency relationships.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen b94d7ad236 update_cpu_features: remove some amdgcn codegen options 
The sramecc and xnack features will be removed with LLVM 24. For now, we just
omit them from std.Target.amdgcn when generating it.

closes https://github.com/ziglang/zig/issues/23539
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 1f099c4536 test-llvm: test s390x and sparc/sparc64 soft float 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen de0818df89 update_cpu_features: remove some x86 codegen options 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 1940ae589b update_cpu_features: remove x86 soft_float feature 
Soft float on x86 now requires setting an appropriate target triple, such as
x86-freestanding-eabi. In the future, this will become less weird when we add a
float ABI component to the target syntax.
 2026-10-26 11:02:43 +01:00
Alex Rønne Petersen 24643dfec1 update_cpu_features: remove thumb_mode arm feature 
This is now derived from the target's arch tag in the compiler.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 2fcfe11af3 update_cpu_features: remove no_unaligned_access from thunderx3t110 aarch64 model 
LLVM includes it for performance reasons. That's all well and good, but the same
argument could be used for basically every single aarch64 model. And the feature
is supposed to indicate whether an unaligned access traps, not whether it's
slow.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 8a6179b923 update_cpu_features: remove some aarch64 codegen options 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 9a5d8fbad9 update_cpu_features: flatten some aarch64 model family features 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen f38622eb07 compiler: fix llvmMachineAbi() for soft float aarch64 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 241d5d54f7 compiler: handle xtensa windowed feature hack in the frontend 
This is a real CPU feature, and the only reason we have to turn it off for the
call0 ABI is due to an LLVM limitation. So the compiler is the right place to
handle this.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen a79c0e383c test: stop using long-calls on thumb 
No longer necessary since we use -ffunction-sections.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 60064a5ba8 compiler: stop using long-calls on hexagon 
No longer necessary since LLD supports thunks and we use -ffunction-sections.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 9df8804bf4 compiler: use -ffunction-sections by default on LLVM targets with short branches 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 9092424fc3 make -ffunction-sections and -fdata-sections resolved config options 
In preparation for giving them defaults that depend on the target and backend.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 84d9795610 cmake: no need for -fdata-sections 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen abcb478ff6 compiler_rt.atomics: sparc v9 has usize atomics too 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 2b073f92d3 compiler_rt.elf.tls: deal with the gap between ABI TCB and TLS blocks on or1k 
https://git.musl-libc.org/cgit/musl/commit/?id=de5536d827114ebc6b6db7800216610385663ad2
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen a30cb05cd0 llvm: remove unnecessary @trap() special case for mips+notraps 
The LLVM backend always emits a break instruction for the trap intrinsic.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 4cb76bab3f compiler: base loongarch float abi on target.abi rather than cpu features 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 1b0ebcd8ab std.zig.system.loongarch: more robust model and variant detection 
This is closer to how the Linux kernel does it.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen aa9f92f9fd std.Target: support arm-switch-eabihf target 
contributes to https://codeberg.org/ziglang/zig/issues/31341
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 79a849bd43 std.Target.mips: regenerate from LLVM 23.1.4 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 72a87418ac update_cpu_features: clean up arm features a bit 
* Remove codegen options
* Flatten microarchitecture features
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen e887cc7bc5 update_cpu_features: make strict/unaligned access feature names consistent 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 9b4357b021 update_cpu_features: clean up riscv features/models a bit 
* Remove codegen options
* Remove experimental ISA extensions
* Remove (unusable) generic and generic_ooo models
* Flatten microarchitecture features
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 8129303f50 update_cpu_features: remove special avr feature 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 785bb6e576 update_cpu_features: clean up powerpc features/models a bit 
* Remove codegen options
* Remove future ISA extensions/models
* Remove generic model
* Rename ppc model to ppc32
* Flatten microarchitecture features
* Fix fast-mflr casing
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 29fc5f0574 update_cpu_features: rename LLVM's horribly long s390x feature names 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 914cfecc76 update_cpu_features: remove forced_atomics xtensa codegen option 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen cf589109e7 update_cpu_features: clean up sparc features a bit 
* Remove codegen options
* Flatten microarchitecture features
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 0d907c3dd3 update_cpu_features: remove some loongarch codegen options 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 030831549b update_cpu_features: remove some hexagon codegen options 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen e3cf4a4fa5 update_cpu_features: remove x32 x86 feature 
LLVM sets this internally from the triple.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 2fb7ecf87d update_cpu_features: remove 64bit powerpc feature 
LLVM sets this internally from the triple.
 2026-10-26 11:02:42 +01:00
Alex Rønne Petersen 5a17d53bec update_cpu_features: remove some s390x codegen options 2026-10-26 11:02:42 +01:00