21072 Commits
Author SHA1 Message Date
586355a83b [Refactor] attention: Route every FlashAttention call through the selected kernel (#46695)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
2026-10-27 17:11:58 -07:00
Michael 20b439ca77 [CI] [AMD] miles-nightly: Split the 8-GPU suite into two jobs (#46750) 2026-10-28 08:10:08 +08:00
Liangsheng Yin 655059819c [Fix] dsv41: Use --attn-dp-size in the Engram docs and restore env overrides on exceptions (#46896) 2026-10-27 16:49:10 -07:00
zijiexia e0641da8f8 Revert "[Doc] beam: Use lmsysorg/sglang:dev image in the cookbook" (#46895) 2026-10-27 16:34:42 -07:00
2c83dc6656 [Perf] [AMD] vattn-asm: Split small-batch MTP verify attention over all CUs on gfx950 (#45555)
Co-authored-by: jacky.cheng <yichiche@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-10-27 16:26:16 -07:00
zijiexiaandClaude Opus 5.5 ab5602731f [Doc] beam: Use lmsysorg/sglang:dev image in the cookbook (#46886)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 16:25:34 -07:00
Khoa PhamandClaude Opus 5.5 a0d4034d5b [Fix] dsv4: Build the DSpark draft block metadata without host sequence lengths (#46891)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 16:19:02 -07:00
Liangsheng Yin 90a7339419 [Feat] dsv41: Choose where Engram tables live with --engram-config (#46893) 2026-10-27 16:15:19 -07:00
f9f2665b6e [Fix] [AMD] moe/topk: Preserve fp32 bias across aiter routing paths (#44797)
Preserve fp32 correction bias through select_experts and prepare one logits/bias pair before the AITER versus radix4 dispatch. This keeps precision consistent across the radix4 batch cutoff and avoids an unused bias downcast.

Consolidate CPU dispatch coverage into the existing correction-bias cache test file and cover the real AITER/radix4 path in the existing AMD test file.

Fixes #44794.

Co-authored-by: Junyi Yao <64238008+Kylinny@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Emil Bogomolov <25350960+zetyquickly@users.noreply.github.com>
2026-10-27 16:04:43 -07:00
Chunan ZengandClaude Opus 5.5 7e142dd9fd [Perf] moe: Always pass the global token count to the Mega MoE tile heuristic (#46093)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 15:35:29 -07:00
baa349af7b [Perf] eplb: Fuse expert-count recording into one kernel on CUDA decode graphs (#46497)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
2026-10-27 15:28:45 -07:00
Olga Miroshnichenko 3145c7ae66 [Perf] [AMD] qwen3_5: Quantize the BF16 GDN projections to MXFP4 online (#43839) 2026-10-27 15:27:16 -07:00
Jzz1943 7f07519943 [Fix] DSA/KDA: Handle MoE padding in hybrid MTP verification (#43271) 2026-10-27 15:21:36 -07:00
Liangsheng Yin 010eb729be [Refactor] bcg: Delete capture leftovers and rename capture_stub to on_capture (#46792) 2026-10-27 15:05:58 -07:00
YAMY b74fd392e1 [Perf] [NVIDIA] speculative: Move the host work between Qwen3.5 MTP decode graphs into the graphs (1/2) (#45474) 2026-10-27 14:42:45 -07:00
148bea7302 [Perf] QSA: Remove the D2D copy in prefill generated kv gather (#45753)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: Shunkang <182541032+Shunkangz@users.noreply.github.co>
2026-10-27 14:41:14 -07:00
YAMY 8f1b7691ca [Feat] [NVIDIA] megakernels: Qwen3.5 binding and EAGLE entry wiring for NVIDIA megakernel plugins (#45266) 2026-10-27 14:02:53 -07:00
6be218a0f2 [Fix] rust-server: Report the launched --tokenizer-path from the info endpoints (#46879)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: shodoco <shodoco@users.noreply.github.com>
2026-10-27 13:56:46 -07:00
Liangsheng Yin bda3718df0 [Refactor] bcg: Record graph breaks at capture without running them (#46719) 2026-10-27 13:53:11 -07:00
37e9bdb7a7 [Feat] jit: Split a header-only module's kernel instantiations across parallel translation units (#46863)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: mxz297 <mxz297@users.noreply.github.com>
2026-10-27 13:49:32 -07:00
zanes-opsandShangming Cai e80120b4fb [Fix] eplb: Load all local replicas of each expert (#45363)
Signed-off-by: Zane <zanes@nvidia.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
2026-10-27 13:48:19 -07:00
maocheng23 4a58dc9838 [Feat] scheduler: Add forward observer and deferred responses for plugins (#43450) 2026-10-27 13:37:12 -07:00
Jan SchalkampandXiaoyu Zhang a4a19332ab [Perf] paged-experts: fewer host syncs in host-planned steps (#46567)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-10-28 03:36:11 +08:00
Avaya AggarwalandXiaoyu Zhang 69767e5aa6 [Fix] diffusion: float32 Plucker rays for bf16 camera poses (#45638)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-10-28 03:35:48 +08:00
Avaya Aggarwal c45ebb507d [Fix] diffusion: HunyuanImage-3 MoE shared MLP and timestep schedule on CUDA (#46600) 2026-10-28 03:34:46 +08:00
Avaya Aggarwal dc41126cde [Fix] diffusion: LoRA format alpha and rank scaling (#45833) 2026-10-28 03:34:18 +08:00
Thomas Wang 5044779f0f [Feat] [AMD] mono-kernels: Register specs by model type (#46036) 2026-10-27 12:33:04 -07:00
Qiaolin Yu 41fb719cf2 [Feat] model: Add Flint (RecursiveSI/flint) support (#45624) 2026-10-27 12:21:10 -07:00
maocheng23 b068417bfc [Feat] dflash: Serve SpecForge MLA drafts through the target MLA attention (#44676) 2026-10-27 12:14:03 -07:00
e7c55f6959 [Fix] mem_cache: Clamp SWA tombstone recovery to the request's protected prefix (#46700)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: xiezhq-hermann <xiezhq-hermann@users.noreply.github.com>
2026-10-27 11:46:40 -07:00
b28f4fc065 [Perf] disaggregation: Restore host-received decode KV without blocking the scheduler (#46689)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: ZYHowell <ZYHowell@users.noreply.github.com>
2026-10-27 11:46:34 -07:00
b7ac4c0e72 [Perf] radix-tree: Keep the GIL for tree-core flag, size and digest reads unless the core is busy (#46674)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: Jialin <Jialin@users.noreply.github.com>
2026-10-27 11:46:28 -07:00
b48aba306b [Test] rust-server: Drop two unit tests that mirror one-line delegations (#46629)
Co-authored-by: metamergebot <metamergebot@users.noreply.github.com>
Co-authored-by: shodoco <shodoco@users.noreply.github.com>
2026-10-27 11:46:22 -07:00
Michael cb55d77d37 [CI] [AMD] deps: Install openai 2.8.0 in AMD CI for the Responses API (#46774) 2026-10-27 09:53:57 -07:00
Michael ec54c220f8 [CI] [AMD] diffusion: Skip the CUDA-only Nomas fused-kernel and FlexAttention unit tests on ROCm (#46686) 2026-10-28 00:37:54 +08:00
Xinyuan Tong 33e8e0fabd [Doc] cookbook: Add LFM3 cookbook (#46859) 2026-10-28 00:18:53 +08:00
Yuhao Yang de26bb16a9 [Fix] custom-all-reduce: Remove multi-node VMM allocator gate (#46853) 2026-10-27 22:53:54 +08:00
shun8686 635430d073 [CI] [NPU] precise-test: skip suites that register no PR test (#46844) 2026-10-27 21:16:48 +08:00
7fe5b127e4 [Fix] disaggregation: Avoid extra GPU contexts with PD (#45678)
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Co-authored-by: Po-Han Huang <pohanh@nvidia.com>
2026-10-27 20:19:23 +08:00
Po-Han Huang (NVIDIA)andClaude Opus 5.5 359bfc1950 [Doc] cookbook: Refresh SemiAnalysis AgentX launches with DeepSeek-V4 B200 DSpark6 disagg and Muse Spark GB300 points (#46807)
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 19:53:31 +08:00
amote-i 82b90efc84 [Doc] [NPU] docs: update npu docs and fix some issues (#46736) 2026-10-27 19:52:56 +08:00
Yihao WangandAlison Shao 7e5cd57028 [CI] slash-command: Drive opt-in CI tiers from a registry (#45735)
Co-authored-by: Alison Shao <54658187+alisonshao@users.noreply.github.com>
2026-10-27 04:23:39 -07:00
YC Yen-Ching Tseng f9257d6c7c [Perf] [AMD] rccl: upgrade rccl to 2.32.3 for rocm10.1 (#45576) 2026-10-27 19:18:52 +08:00
a6f5bd397b [Perf] [AMD] fp8: Use the AITER CK blockscale GEMM by default on gfx942 (#43815)
Signed-off-by: siliangchen-amd <SiLiang.Chen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-10-27 18:58:11 +08:00
Avaya Aggarwal 8a455f1b90 [Fix] diffusion: pipeline and model-helper bug fixes (#44888) 2026-10-27 18:39:21 +08:00
Jan Schalkamp 8063296528 [Perf] paged-experts: fuse slot lookup into decide (#46457) 2026-10-27 18:38:59 +08:00
3927a73a34 [Fix] kda: Use raw beta in prefill CUDA graphs (#44778)
Co-authored-by: Hrithvik Alex <hrithvik@baseten.co>
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
2026-10-27 02:29:33 -07:00
9d45fdda46 [Fix] qwen3_coder: Preserve structured values in qwen3_coder mixed unions (#44124)
Signed-off-by: Ryan Stewart <rystewart@nvidia.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
Co-authored-by: Po-Han Huang <pohanh@nvidia.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 17:01:36 +08:00
922e595a94 [Chore] [NVIDIA] docker: Update to torch 2.15rc1 in CUDA 13.4 container (#45858)
Co-authored-by: Po-Han Huang <pohanh@nvidia.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 16:52:08 +08:00
weireweireandweireweire 24d55621a3 [Fix] dspark: Draw the simulated-acceptance bonus at the simulated row (#46404)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
2026-10-27 01:48:20 -07:00