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tcg: Generic expansion of tcg_gen_rotl_*

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Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson committed 2026-10-24 17:14:50 +02:00
1 parent 45af10a141
commit c3ff29531e
3 files changed
+21 -44
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include/tcg/tcg-op-common.h
-2
View File
@@ -129,7 +129,6 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
/* 32 bit ops */
void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
@@ -184,7 +183,6 @@ void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
/* 64 bit ops */
void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
include/tcg/tcg-op-def.h.inc
+1
View File
@@ -34,6 +34,7 @@ DEF3(ori, TCGV, TCGV, TINT)
DEF3(orc, TCGV, TCGV, TCGV)
DEF3(rem, TCGV, TCGV, TCGV)
DEF3(remu, TCGV, TCGV, TCGV)
DEF3(rotl, TCGV, TCGV, TCGV)
DEF3(sar, TCGV, TCGV, TCGV)
DEF3(sari, TCGV, TCGV, TINT)
DEF4(setcond, TCGCond, TCGV, TCGV, TCGV)
tcg/tcg-op.c
+20 -42
View File
@@ -744,6 +744,26 @@ void tcg_gen_remu(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
}
}
void tcg_gen_rotl(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
{
if (tcg_op_supported(INDEX_op_rotl, type, 0)) {
tcg_gen_op_ttt(INDEX_op_rotl, type, dst, src1, src2);
} else if (tcg_op_supported(INDEX_op_rotr, type, 0)) {
g_autoptr(TCGTemp) tmp = tcg_temp_new_ebb(type);
tcg_gen_neg(type, tmp, src2);
tcg_gen_op_ttt(INDEX_op_rotr, type, dst, src1, tmp);
} else {
g_autoptr(TCGTemp) t0 = tcg_temp_new_ebb(type);
g_autoptr(TCGTemp) t1 = tcg_temp_new_ebb(type);
tcg_gen_shl(type, t0, src1, src2);
tcg_gen_neg(type, t1, src2);
tcg_gen_shr(type, t1, src1, t1);
tcg_gen_or(type, dst, t0, t1);
}
}
void tcg_gen_sar(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
{
tcg_gen_op_ttt(INDEX_op_sar, type, dst, src1, src2);
@@ -845,27 +865,6 @@ void tcg_gen_xori(TCGType type, TCGTemp *dst, TCGTemp *src1, int64_t src2)
/* 32 bit ops */
void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
if (tcg_op_supported(INDEX_op_rotl, TCG_TYPE_I32, 0)) {
tcg_gen_op3_i32(INDEX_op_rotl, ret, arg1, arg2);
} else if (tcg_op_supported(INDEX_op_rotr, TCG_TYPE_I32, 0)) {
TCGv_i32 t0 = tcg_temp_ebb_new_i32();
tcg_gen_neg_i32(t0, arg2);
tcg_gen_op3_i32(INDEX_op_rotr, ret, arg1, t0);
tcg_temp_free_i32(t0);
} else {
TCGv_i32 t0 = tcg_temp_ebb_new_i32();
TCGv_i32 t1 = tcg_temp_ebb_new_i32();
tcg_gen_shl_i32(t0, arg1, arg2);
tcg_gen_neg_i32(t1, arg2);
tcg_gen_shr_i32(t1, arg1, t1);
tcg_gen_or_i32(ret, t0, t1);
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
}
}
void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
{
tcg_debug_assert(arg2 >= 0 && arg2 < 32);
@@ -1676,27 +1675,6 @@ void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg)
}
}
void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
if (tcg_op_supported(INDEX_op_rotl, TCG_TYPE_I64, 0)) {
tcg_gen_op3_i64(INDEX_op_rotl, ret, arg1, arg2);
} else if (tcg_op_supported(INDEX_op_rotl, TCG_TYPE_I64, 0)) {
TCGv_i64 t0 = tcg_temp_ebb_new_i64();
tcg_gen_neg_i64(t0, arg2);
tcg_gen_op3_i64(INDEX_op_rotr, ret, arg1, t0);
tcg_temp_free_i64(t0);
} else {
TCGv_i64 t0 = tcg_temp_ebb_new_i64();
TCGv_i64 t1 = tcg_temp_ebb_new_i64();
tcg_gen_shl_i64(t0, arg1, arg2);
tcg_gen_neg_i64(t1, arg2);
tcg_gen_shr_i64(t1, arg1, t1);
tcg_gen_or_i64(ret, t0, t1);
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}
}
void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
{
tcg_debug_assert(arg2 >= 0 && arg2 < 64);