mirror of
https://gitlab.com/qemu-project/qemu.git
synced 2026-10-28 14:04:39 +08:00
tcg: Generic expansion of tcg_gen_shli_*
Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
1 parent
94045c3eb3
commit
463a033bac
3 files changed
+11
-22
No files matched your search
@@ -126,7 +126,6 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
|
||||
void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
|
||||
@@ -217,7 +216,6 @@ void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg);
|
||||
void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
|
||||
|
||||
@@ -12,6 +12,7 @@ DEF2(neg, TCGV, TCGV)
|
||||
DEF3(or, TCGV, TCGV, TCGV)
|
||||
DEF3(sar, TCGV, TCGV, TCGV)
|
||||
DEF3(shl, TCGV, TCGV, TCGV)
|
||||
DEF3(shli, TCGV, TCGV, TINT)
|
||||
DEF3(shr, TCGV, TCGV, TCGV)
|
||||
DEF3(sub, TCGV, TCGV, TCGV)
|
||||
DEF3(subi, TCGV, TCGV, TINT)
|
||||
|
||||
+10
-20
@@ -424,6 +424,16 @@ void tcg_gen_shl(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
|
||||
tcg_gen_op_ttt(INDEX_op_shl, type, dst, src1, src2);
|
||||
}
|
||||
|
||||
void tcg_gen_shli(TCGType type, TCGTemp *dst, TCGTemp *src1, int64_t src2)
|
||||
{
|
||||
tcg_debug_assert(src2 >= 0 && src2 < tcg_type_bits(type));
|
||||
if (src2 == 0) {
|
||||
tcg_gen_mov(type, dst, src1);
|
||||
} else {
|
||||
tcg_gen_shl(type, dst, src1, tcg_constant_internal(type, src2));
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_shr(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
|
||||
{
|
||||
tcg_gen_op_ttt(INDEX_op_shr, type, dst, src1, src2);
|
||||
@@ -520,16 +530,6 @@ void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
|
||||
{
|
||||
tcg_debug_assert(arg2 >= 0 && arg2 < 32);
|
||||
if (arg2 == 0) {
|
||||
tcg_gen_mov_i32(ret, arg1);
|
||||
} else {
|
||||
tcg_gen_shl_i32(ret, arg1, tcg_constant_i32(arg2));
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
|
||||
{
|
||||
tcg_debug_assert(arg2 >= 0 && arg2 < 32);
|
||||
@@ -1549,16 +1549,6 @@ void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
||||
{
|
||||
tcg_debug_assert(arg2 >= 0 && arg2 < 64);
|
||||
if (arg2 == 0) {
|
||||
tcg_gen_mov_i64(ret, arg1);
|
||||
} else {
|
||||
tcg_gen_shl_i64(ret, arg1, tcg_constant_i64(arg2));
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
|
||||
{
|
||||
tcg_debug_assert(arg2 >= 0 && arg2 < 64);
|
||||
|
||||
Reference in new issue
Block a user