mirror of
https://gitlab.com/qemu-project/qemu.git
synced 2026-10-28 14:04:39 +08:00
tcg: Generic expansion of tcg_gen_nor_*
Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
1 parent
3c985f5c88
commit
31dd2d3f3f
3 files changed
+11
-22
No files matched your search
@@ -123,7 +123,6 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
|
||||
|
||||
/* 32 bit ops */
|
||||
|
||||
void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
|
||||
void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
|
||||
void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
|
||||
void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
|
||||
@@ -198,7 +197,6 @@ void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
|
||||
|
||||
/* 64 bit ops */
|
||||
|
||||
void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
|
||||
void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
|
||||
void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
|
||||
void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
|
||||
|
||||
@@ -16,6 +16,7 @@ DEF3(mul, TCGV, TCGV, TCGV)
|
||||
DEF3(muli, TCGV, TCGV, TINT)
|
||||
DEF3(nand, TCGV, TCGV, TCGV)
|
||||
DEF2(neg, TCGV, TCGV)
|
||||
DEF3(nor, TCGV, TCGV, TCGV)
|
||||
DEF2(not, TCGV, TCGV)
|
||||
DEF3(or, TCGV, TCGV, TCGV)
|
||||
DEF3(ori, TCGV, TCGV, TINT)
|
||||
|
||||
+10
-20
@@ -490,6 +490,16 @@ void tcg_gen_neg(TCGType type, TCGTemp *dst, TCGTemp *src)
|
||||
tcg_gen_op_tt(INDEX_op_neg, type, dst, src);
|
||||
}
|
||||
|
||||
void tcg_gen_nor(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_nor, type, 0)) {
|
||||
tcg_gen_op_ttt(INDEX_op_nor, type, dst, src1, src2);
|
||||
} else {
|
||||
tcg_gen_or(type, dst, src1, src2);
|
||||
tcg_gen_not(type, dst, dst);
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_not(TCGType type, TCGTemp *dst, TCGTemp *src)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_not, type, 0)) {
|
||||
@@ -695,16 +705,6 @@ void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret,
|
||||
tcg_gen_negsetcond_i32(cond, ret, arg1, tcg_constant_i32(arg2));
|
||||
}
|
||||
|
||||
void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_nor, TCG_TYPE_I32, 0)) {
|
||||
tcg_gen_op3_i32(INDEX_op_nor, ret, arg1, arg2);
|
||||
} else {
|
||||
tcg_gen_or_i32(ret, arg1, arg2);
|
||||
tcg_gen_not_i32(ret, ret);
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_orc, TCG_TYPE_I32, 0)) {
|
||||
@@ -1722,16 +1722,6 @@ void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg)
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_nor, TCG_TYPE_I64, 0)) {
|
||||
tcg_gen_op3_i64(INDEX_op_nor, ret, arg1, arg2);
|
||||
} else {
|
||||
tcg_gen_or_i64(ret, arg1, arg2);
|
||||
tcg_gen_not_i64(ret, ret);
|
||||
}
|
||||
}
|
||||
|
||||
void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
|
||||
{
|
||||
if (tcg_op_supported(INDEX_op_orc, TCG_TYPE_I64, 0)) {
|
||||
|
||||
Reference in new issue
Block a user