mirror of
https://codeberg.org/ziglang/zig.git
synced 2026-10-29 03:06:10 +08:00
Alex Rønne Petersen
0d142b9e17
* mesa3d is for internal use in Mesa's shader compilation pipeline. This never really made sense to have in Zig. * amdpal is for LLPC, part of AMDVLK, which AMD discontinued development of in favor of RADV in 2025. Follow-up work: Removing the amdgcn_cs calling convention.
115 lines
4.4 KiB
Plaintext
115 lines
4.4 KiB
Plaintext
#skip amdgcn-amdhsa-none-baseline-whole-llvm-lld-pic
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#skip csky-freestanding-eabi-baseline-whole-llvm-lld-pic
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#skip csky-freestanding-eabihf-baseline-whole-llvm-lld-pic
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#skip csky-linux-eabi-baseline-whole-llvm-lld-pic
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#skip csky-linux-eabihf-baseline-whole-llvm-lld-pic
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#skip csky-linux-gnueabi-baseline-whole-llvm-lld-pic
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#skip csky-linux-gnueabihf-baseline-whole-llvm-lld-pic
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#skip bpfeb-freestanding-none-baseline-whole-llvm-lld-pic
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#skip bpfel-freestanding-none-baseline-whole-llvm-lld-pic
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#skip loongarch32-freestanding-none-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-gnu-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-gnuf32-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-gnusf-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-musl-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-muslf32-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-muslsf-baseline-whole-llvm-lld-pic
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#skip loongarch32-linux-none-baseline-whole-llvm-lld-pic
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#skip loongarch32-uefi-none-baseline-whole-llvm-lld-pic
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#skip loongarch64-freestanding-none-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-gnu-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-gnuf32-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-gnusf-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-musl-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-muslf32-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-muslsf-baseline-whole-llvm-lld-pic
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#skip loongarch64-linux-none-baseline-whole-llvm-lld-pic
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#skip loongarch64-uefi-none-baseline-whole-llvm-lld-pic
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#skip nvptx-cuda-none-baseline-whole-llvm-lld-pic
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#skip nvptx-nvcl-none-baseline-whole-llvm-lld-pic
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#skip nvptx64-cuda-none-baseline-whole-llvm-lld-pic
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#skip nvptx64-nvcl-none-baseline-whole-llvm-lld-pic
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#skip riscv32-freestanding-none-baseline-whole-llvm-lld-pic
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#skip riscv32-linux-gnu-baseline-whole-llvm-lld-pic
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#skip riscv32-linux-musl-baseline-whole-llvm-lld-pic
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#skip riscv32-linux-none-baseline-whole-llvm-lld-pic
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#skip riscv32-netbsd-none-baseline-whole-llvm-lld-pic
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#skip riscv32-rtems-none-baseline-whole-llvm-lld-pic
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#skip riscv32-uefi-none-baseline-whole-llvm-lld-pic
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#skip riscv32be-freestanding-none-baseline-whole-llvm-lld-pic
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#skip riscv64-freebsd-none-baseline-whole-llvm-lld-pic
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#skip riscv64-freestanding-none-baseline-whole-llvm-lld-pic
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#skip riscv64-fuchsia-none-baseline-whole-llvm-lld-pic
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#skip riscv64-haiku-none-baseline-whole-llvm-lld-pic
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#skip riscv64-hurd-gnu-baseline-whole-llvm-lld-pic
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#skip riscv64-linux-android-baseline-whole-llvm-lld-pic
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#skip riscv64-linux-gnu-baseline-whole-llvm-lld-pic
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#skip riscv64-linux-musl-baseline-whole-llvm-lld-pic
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#skip riscv64-linux-none-baseline-whole-llvm-lld-pic
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#skip riscv64-netbsd-none-baseline-whole-llvm-lld-pic
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#skip riscv64-openbsd-none-baseline-whole-llvm-lld-pic
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#skip riscv64-rtems-none-baseline-whole-llvm-lld-pic
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#skip riscv64-serenity-none-baseline-whole-llvm-lld-pic
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#skip riscv64-uefi-none-baseline-whole-llvm-lld-pic
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#skip riscv64be-freestanding-none-baseline-whole-llvm-lld-pic
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#skip spirv32-opencl-none-baseline-whole-llvm-lld-pic
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#skip spirv32-opengl-none-baseline-whole-llvm-lld-pic
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#skip spirv32-vulkan-none-baseline-whole-llvm-lld-pic
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#skip spirv64-amdhsa-none-baseline-whole-llvm-lld-pic
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#skip spirv64-opencl-none-baseline-whole-llvm-lld-pic
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#skip spirv64-vulkan-none-baseline-whole-llvm-lld-pic
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#skip x86_64-linux-gnux32-baseline-whole-llvm-new-pic
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#skip x86_64-linux-muslx32-baseline-whole-llvm-new-pic
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#skip x86_64-linux-x32-baseline-whole-llvm-new-pic
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#obj {
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--name test -fno-lld -fno-new-linker -ofmt=llvmir
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-Mroot=test.zig
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#}
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#write test.zig {
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export fn entry(arr: *const [16]u8) @Vector(16, u8) {
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return arr.*;
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}
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#}
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#update "one vector load"
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#check llvm {
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define #...<16 x i8> @test.entry(#...) #...{
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#...
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%1 = alloca [16 x i8], align 1#...
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%3 = load <16 x i8>, ptr %1, align 1#...
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ret <16 x i8> %3#...
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#}
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#write test.zig {
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export fn entry(a: *@Vector(8, u8), b: *@Vector(8, u8), src: [*]const u8) void {
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const q: @Vector(16, u8) = src[0..16].*;
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a.* = @shuffle(u8, q, undefined, @Vector(8, i32){ 0, 1, 2, 3, 4, 5, 6, 7 });
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b.* = @shuffle(u8, q, undefined, @Vector(8, i32){ 7, 8, 9, 10, 11, 12, 13, 14 });
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}
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#}
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#update "feeding overlapping shuffles"
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#check llvm {
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define #...void @test.entry(ptr #...%0, ptr #...%1, #...) #...{
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#...
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%11 = load <16 x i8>, ptr %#...
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%12 = shufflevector <16 x i8> %11, #...
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store <8 x i8> %12, ptr %0, align 8#...
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%13 = shufflevector <16 x i8> %11, #...
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store <8 x i8> %13, ptr %1, align 8#...
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ret void#...
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}
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#}
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