zig/lib/std/Target/z80.zig

//! This file is auto-generated by tools/update_cpu_features.zig.

const std = @import("../std.zig");
const CpuFeature = std.Target.Cpu.Feature;
const CpuModel = std.Target.Cpu.Model;

pub const Feature = enum {
    epu,
    ez80,
    infc,
    no_inirx,
    no_ld_i_hl,
    r800,
    reliable_ld_a_i,
    sli,
    xdcb,
    xyhl,
    z180,
    z280,
    z380,
    z80n,
};

pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;

pub const all_features = blk: {
    const len = @typeInfo(Feature).@"enum".field_names.len;
    std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
    var result: [len]CpuFeature = undefined;
    result[@backingInt(Feature.epu)] = .{
        .llvm_name = null,
        .description = "Enable Extended Processing Unit instructions",
        .dependencies = featureSet(&[_]Feature{
            .z280,
        }),
    };
    result[@backingInt(Feature.ez80)] = .{
        .llvm_name = null,
        .description = "Enable eZ80 instructions including ADL mode",
        .dependencies = featureSet(&[_]Feature{
            .xyhl,
            .z180,
        }),
    };
    result[@backingInt(Feature.infc)] = .{
        .llvm_name = null,
        .description = "Enable flags-only port input instruction",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.no_inirx)] = .{
        .llvm_name = null,
        .description = "Disable block I/O instructions that address the port with DE and count with BC",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.no_ld_i_hl)] = .{
        .llvm_name = null,
        .description = "Disable 16-bit I register transfers",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.r800)] = .{
        .llvm_name = null,
        .description = "Enable R800 instructions",
        .dependencies = featureSet(&[_]Feature{
            .infc,
            .xyhl,
        }),
    };
    result[@backingInt(Feature.reliable_ld_a_i)] = .{
        .llvm_name = null,
        .description = "LD A,I and LD A,R reliably report the interrupt enable state",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.sli)] = .{
        .llvm_name = null,
        .description = "Enable shift left inserting 1 instructions",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.xdcb)] = .{
        .llvm_name = null,
        .description = "Enable indexed rotate, shift, RES, and SET instructions that also store to a register",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.xyhl)] = .{
        .llvm_name = null,
        .description = "Enable index register halves (IXH, IXL, IYH, IYL)",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.z180)] = .{
        .llvm_name = null,
        .description = "Enable Z180 instructions",
        .dependencies = featureSet(&[_]Feature{}),
    };
    result[@backingInt(Feature.z280)] = .{
        .llvm_name = null,
        .description = "Enable Z280 instructions",
        .dependencies = featureSet(&[_]Feature{
            .infc,
            .xyhl,
        }),
    };
    result[@backingInt(Feature.z380)] = .{
        .llvm_name = null,
        .description = "Enable Z380 instructions including long mode",
        .dependencies = featureSet(&[_]Feature{
            .xyhl,
            .z180,
        }),
    };
    result[@backingInt(Feature.z80n)] = .{
        .llvm_name = null,
        .description = "Enable Z80N instructions",
        .dependencies = featureSet(&[_]Feature{}),
    };
    const ti = @typeInfo(Feature);
    for (&result, 0..) |*elem, i| {
        elem.index = i;
        elem.name = ti.@"enum".field_names[i];
    }
    break :blk result;
};

pub const cpu = struct {
    pub const ez80: CpuModel = .{
        .name = "ez80",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .ez80,
            .reliable_ld_a_i,
        }),
    };
    pub const ez80190: CpuModel = .{
        .name = "ez80190",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .ez80,
            .no_inirx,
            .no_ld_i_hl,
            .reliable_ld_a_i,
        }),
    };
    pub const ez80f92: CpuModel = .{
        .name = "ez80f92",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .ez80,
            .no_ld_i_hl,
            .reliable_ld_a_i,
        }),
    };
    pub const r800: CpuModel = .{
        .name = "r800",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .r800,
        }),
    };
    pub const z180: CpuModel = .{
        .name = "z180",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .z180,
        }),
    };
    pub const z280: CpuModel = .{
        .name = "z280",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .reliable_ld_a_i,
            .z280,
        }),
    };
    pub const z380: CpuModel = .{
        .name = "z380",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .reliable_ld_a_i,
            .z380,
        }),
    };
    pub const z80: CpuModel = .{
        .name = "z80",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{}),
    };
    pub const z80n: CpuModel = .{
        .name = "z80n",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .infc,
            .reliable_ld_a_i,
            .sli,
            .xdcb,
            .xyhl,
            .z80n,
        }),
    };
    pub const z8400: CpuModel = .{
        .name = "z8400",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .infc,
            .sli,
            .xdcb,
            .xyhl,
        }),
    };
    pub const z84c00: CpuModel = .{
        .name = "z84c00",
        .llvm_name = null,
        .features = featureSet(&[_]Feature{
            .infc,
            .reliable_ld_a_i,
            .sli,
            .xdcb,
            .xyhl,
        }),
    };
};