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175 lines
6.5 KiB
C++
Vendored
175 lines
6.5 KiB
C++
Vendored
/*===-------- avx512bmmintrin.h - AVX512BMM intrinsics *------------------===
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*
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===---------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512bmmintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef _AVX512BMMINTRIN_H
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#define _AVX512BMMINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, __target__("avx512bmm"), \
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__min_vector_width__(512)))
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#if defined(__cplusplus) && (__cplusplus >= 201103L)
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#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
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#else
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#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
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#endif
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/// Multiplies two 16x16 bit matrices using OR reduction and ORs the product
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/// into a third 16x16 bit matrix (which is also the destination).
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///
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/// For the 512-bit ZMM form, each register contains two 16x16 (256-bit)
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/// matrices in bits [255:0] and [511:256]. The operation performs:
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/// \code{.operation}
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/// for i in 0 to 15
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/// for j in 0 to 15
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/// reduction_bit = __C[16*i+j]
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/// for k in 0 to 15
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/// reduction_bit |= __A[16*i+k] & __B[16*k+j]
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/// end for k
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/// dest[16*i+j] = reduction_bit
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/// end for j
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/// end for i
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/// \endcode
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> VBMACOR16X16X16 </c> instruction.
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///
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/// \param __A
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/// A 512-bit vector containing two 16x16 bit matrices (one per 256-bit
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/// lane).
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/// \param __B
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/// A 512-bit vector containing two 16x16 bit matrices (one per 256-bit
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/// lane).
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/// \param __C
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/// A 512-bit accumulator vector containing the initial values to OR with.
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/// \returns A 512-bit vector containing the accumulated result for each lane.
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/// \note This instruction does not support masking.
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static __inline __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
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_mm512_bmacor16x16x16(__m512i __A, __m512i __B, __m512i __C) {
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return (__m512i)__builtin_ia32_bmacor16x16x16_v32hi(
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(__v32hi)__A, (__v32hi)__B, (__v32hi)__C);
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}
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/// Multiplies two 16x16 bit matrices using XOR reduction and XORs the product
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/// into a third 16x16 bit matrix (which is also the destination).
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///
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/// For the 512-bit ZMM form, each register contains two 16x16 (256-bit)
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/// matrices in bits [255:0] and [511:256]. The operation performs:
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/// \code{.operation}
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/// for i in 0 to 15
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/// for j in 0 to 15
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/// reduction_bit = __C[16*i+j]
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/// for k in 0 to 15
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/// reduction_bit ^= __A[16*i+k] & __B[16*k+j]
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/// end for k
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/// dest[16*i+j] = reduction_bit
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/// end for j
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/// end for i
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/// \endcode
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> VBMACXOR16X16X16 </c> instruction.
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///
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/// \param __A
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/// A 512-bit vector containing two 16x16 bit matrices (one per 256-bit
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/// lane).
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/// \param __B
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/// A 512-bit vector containing two 16x16 bit matrices (one per 256-bit
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/// lane).
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/// \param __C
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/// A 512-bit accumulator vector containing the initial values to XOR with.
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/// \returns A 512-bit vector containing the accumulated result for each lane.
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/// \note This instruction does not support masking.
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static __inline __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
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_mm512_bmacxor16x16x16(__m512i __A, __m512i __B, __m512i __C) {
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return (__m512i)__builtin_ia32_bmacxor16x16x16_v32hi(
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(__v32hi)__A, (__v32hi)__B, (__v32hi)__C);
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}
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/// Reverses the bits within each byte of the source vector.
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///
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/// For each byte in the source, reverses the order of its 8 bits to generate
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/// the corresponding destination byte. For example, 0b10110001 becomes
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/// 0b10001101.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> VBITREV </c> instruction.
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///
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/// \param __A
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/// A 512-bit vector of [64 x i8] where each byte will have its bits
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/// reversed.
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/// \returns A 512-bit vector of [64 x i8] with bit-reversed bytes.
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static __inline __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
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_mm512_bitrev_epi8(__m512i __A) {
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return (__m512i)__builtin_elementwise_bitreverse((__v64qi)__A);
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}
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/// Reverses the bits within each byte of the source vector, using a writemask
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/// to conditionally select elements.
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///
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/// For each byte position, if the corresponding mask bit is 1, the byte from
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/// \a A has its bits reversed and stored in the result. If the mask bit is 0,
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/// the corresponding byte from \a B is copied to the result (merge masking).
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> VBITREV </c> instruction.
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///
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/// \param __U
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/// A 64-bit mask value where each bit controls one byte (per 8-bit element).
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/// A 1 performs bit reversal; a 0 selects the passthrough byte from __B.
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/// \param __A
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/// A 512-bit vector of [64 x i8] to be bit-reversed.
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/// \param __B
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/// A 512-bit vector of [64 x i8] providing passthrough values.
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/// \returns A 512-bit vector combining bit-reversed and passthrough bytes.
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static __inline __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
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_mm512_mask_bitrev_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_bitrev_epi8(__A), (__v64qi)__B);
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}
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/// Reverses the bits within each byte of the source vector, zeroing elements
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/// based on the writemask.
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///
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/// For each byte position, if the corresponding mask bit is 1, the byte from
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/// \a A has its bits reversed and stored in the result. If the mask bit is 0,
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/// the result byte is set to zero (zero masking).
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> VBITREV </c> instruction.
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///
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/// \param __U
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/// A 64-bit mask value where each bit controls one byte (per 8-bit element).
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/// A 1 performs bit reversal; a 0 sets the byte to zero.
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/// \param __A
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/// A 512-bit vector of [64 x i8] to be bit-reversed.
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/// \returns A 512-bit vector with bit-reversed or zeroed bytes.
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static __inline __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
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_mm512_maskz_bitrev_epi8(__mmask64 __U, __m512i __A) {
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return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
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(__v64qi)_mm512_bitrev_epi8(__A),
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(__v64qi)_mm512_setzero_si512());
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}
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#undef __DEFAULT_FN_ATTRS
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#undef __DEFAULT_FN_ATTRS_CONSTEXPR
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#endif
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