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46 lines
1.4 KiB
C
Vendored
46 lines
1.4 KiB
C
Vendored
/*===---- arm64intr.h - ARM64 Windows intrinsics -------------------------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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/* Only include this if we're compiling for the windows platform. */
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#ifndef _MSC_VER
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#include_next <arm64intr.h>
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#else
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#ifndef __ARM64INTR_H
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#define __ARM64INTR_H
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/* Encode an AArch64 system register for use with
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_ReadStatusReg/_WriteStatusReg. op0 must be 2 or 3; only the low bit is
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stored. */
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#define ARM64_SYSREG(op0, op1, CRn, CRm, op2) \
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((((op0) & 0x1) << 14) | (((op1) & 0x7) << 11) | (((CRn) & 0xF) << 7) | \
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(((CRm) & 0xF) << 3) | ((op2) & 0x7))
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#define ARM64_FPCR ARM64_SYSREG(3, 3, 4, 4, 0)
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#define ARM64_FPSR ARM64_SYSREG(3, 3, 4, 4, 1)
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typedef enum
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{
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_ARM64_BARRIER_SY = 0xF,
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_ARM64_BARRIER_ST = 0xE,
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_ARM64_BARRIER_LD = 0xD,
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_ARM64_BARRIER_ISH = 0xB,
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_ARM64_BARRIER_ISHST = 0xA,
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_ARM64_BARRIER_ISHLD = 0x9,
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_ARM64_BARRIER_NSH = 0x7,
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_ARM64_BARRIER_NSHST = 0x6,
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_ARM64_BARRIER_NSHLD = 0x5,
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_ARM64_BARRIER_OSH = 0x3,
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_ARM64_BARRIER_OSHST = 0x2,
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_ARM64_BARRIER_OSHLD = 0x1
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} _ARM64INTR_BARRIER_TYPE;
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#endif /* __ARM64INTR_H */
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#endif /* _MSC_VER */
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