Commit Graph
115 Commits
Author SHA1 Message Date
Alex Rønne Petersen 53173d25ab std.Target: update CPU models and features to LLVM 23 2026-10-07 00:30:51 +02:00
Justus Klausecker 69a26976ed zig fmt
Converts usages of `@intFromEnum` and `@enumFromInt` to instead use the
new `@backingInt` and `@fromBackingInt` builtins.
2026-07-17 23:30:26 +02:00
Alex Rønne Petersen 3e6b2c6b03 std.Target: fix definition of generic_la64 CPU model
LLVM's generic_la64 model is clearly biased towards Loongson's current offerings
rather than actually reflecting a generic model in the architectural sense. So
fix it up on our side.
2026-07-06 23:27:58 +02:00
Ali Cheraghi be7634b828 Target.spirv: omit Linkage and friends caps/ext from cpu features
Keeping these in cpu features can cause conflict because these are automatically emitted by linker. Closes #35975
2026-06-30 11:58:33 +03:30
Ali Cheraghi 85b0259307 Target: chain spirv versions 2026-06-28 18:25:43 +02:00
Ali Cheraghi 3a48f4bb40 spirv: drive capability and extension emission from target features
- Emitting `OpCapability` and `OpExtension` from assembly is no longer allowed (tbh it never was because we silently ignored them).
  They now `fail` with a message pointing users at `-mcpu`.

- `tools/gen_spirv_spec.zig` now also emits `Extension` and the `Capability.dependencies()`.
  Also To keep the feature set a reasonable size, the generator filters to an allowlist of `KHR` and `EXT` entries.
  We can decide which vendors to allow later if a use-case is found.

- `tools/update_cpu_features.zig` now uses the generated `spec.zig` and emits a  feature for every
  capability and extension, with the capability's `.deps` populated from `Capability.dependencies()`.

- `Module.finalize`, `Module.entryPoints`, `Module.addCapability`, `Module.addExtension`
  and `sections.capabilities`/`sections.extensions` are deleted.

- Linker now verifies that an `.spv` object declares the `Linkage` capability
2026-06-20 09:38:20 +02:00
Leon Lombar 84f84267c7 std.Target: add PSX
Adds target info for the PSX. Builds fine with the following:
```zig
const target = b.resolveTargetQuery(.{
    .os_tag = .psx,
    .cpu_arch = .mipsel,
});
```
the only "problem" being that it spits out an error from LLVM even
though generating an object file succeeds:
```sh
❯ zig build
install
└─ install generated to main.o
   └─ compile obj obj Debug mipsel-psx failure
error: warning: MIPS-I support is experimental
```
2026-06-19 04:22:55 +02:00
Krzysztof Wolicki 9e80795623 all: update to use new std.lang.Type definitions 2026-05-27 10:03:51 +01:00
Alex Rønne Petersen c717b0d08d std.Target: add spacemit_x100 and spacemit_a100 RISC-V CPU models
Backported from LLVM main branch.
2026-05-22 21:12:45 +02:00
Quint Daenen 9787df9421 fix(std.Target/spirv): correct variable_pointers feature description
The description was incorrectly copied from physical_storage_buffer.

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/35272
2026-05-10 08:11:51 +02:00
Matthew Lugg e67c344fc0 compiler,tests,tools: remove uses of capturing errdefer
In preparation for its removal, as accepted in
https://github.com/ziglang/zig/issues/23734.
2026-04-29 23:27:58 +01:00
Alex Rønne Petersen ca0b3318a0 std.Target: update CPU and feature data to LLVM 22 2026-04-25 21:54:47 +02:00
murtaza 4a1383d987 process.Child: use std.posix.SIG instead of u32 for Child.Term stopped field 2026-04-07 10:27:21 +02:00
murtaza 07b49c61ff audit: handle process.Child.Term exhaustively and give useful exit information 2026-04-07 10:27:01 +02:00
Nathan Bourgeois c824ce954e misc: Add allegrex CPU & features, run tool, update semver 2026-03-21 19:39:04 -04:00
Andrew Kelley 54241bc770 tools: update for std.process API changes 2026-01-30 22:03:14 -08:00
Andrew Kelley bf74827ddb test-standalone: update more cases to new main API 2026-01-04 00:27:08 -08:00
Andrew Kelley f28802a9c6 zig libc: fix subcommand
This branch regressed the child process "run" mechanism because it
didn't pass the correct stdin, stdout, stderr values to process.spawn

Fixed now.
2026-01-04 00:27:08 -08:00
Andrew Kelley 2adfd4d107 std.Io: fix and improve Group API
Rename `wait` to `await` to be consistent with Future API. The
convention here is that this set of functionality goes together:
* async/concurrent
* await/cancel

Also rename Select `wait` to `await` for the same reason.

`Group.await` now can return `error.Canceled`. Furthermore,
`Group.await` does not auto-propagate cancelation. Instead, users should
follow the pattern of `defer group.cancel(io);` after initialization,
and doing `try group.await(io);` at the end of the success path.
Advanced logic can choose to do something other than this pattern in the
event of cancelation.

Additionally, fixes a bug in `std.Io.Threaded` future await, in which it
swallowed an `error.Canceled`. Now if a task is canceled while awaiting
a future, after propagating the cancel request, it also recancels,
meaning that the awaiting task will properly detect its own cancelation
at the next cancelation point.

Furthermore, fixes a bug in the compiler where `error.Canceled` was
being swallowed in `dispatchPrelinkWork`.

Finally, fixes std.crypto code that inappropriately used
`catch unreachable` in response to cancelation without even so much as a
comment explaining why it was believed to be unreachable. Now, those
functions have `error.Canceled` in the error set and propagate
cancelation properly.

With this way of doing things, `Group.await` has a nice property: even if
all tasks in the group are CPU bound and without cancelation points, the
`Group.await` can still be canceled. In such case, the task that was
waiting for `await` wakes up with a chance to do some more resource
cleanup tasks, such as canceling more things, before entering the
deferred `Group.cancel` call at which point it has to suspend until the
canceled but uninterruptible CPU bound tasks complete.

closes #30601
2025-12-29 22:47:34 -08:00
Andrew Kelley 669dae140c test-standalone: fix most compilation errors 2025-12-23 22:15:12 -08:00
Andrew Kelley c05e2720a1 tools: fix compilation errors 2025-12-23 22:15:12 -08:00
Andrew Kelley 33e302d67a update remaining calls to std.Io.Threaded.init 2025-12-23 22:15:12 -08:00
Andrew Kelley 50c585227e fix compilation of incr-check 2025-12-23 22:15:11 -08:00
Matthew Lugg 9ae4e38ca2 tools: replace thread pool with std.Io 2025-12-22 12:47:38 +00:00
Alex Rønne Petersen 39e91deb77 std.Target: add CPU features and models for hppa 2025-11-13 22:29:12 +01:00
Alex Rønne Petersen 2b23f98d2c std.Target: add CPU features and models for alpha 2025-11-13 22:28:50 +01:00
Alex Rønne Petersen 2c470d24b3 std.Target: add Arch tag and info for kvx 2025-11-10 08:20:21 +01:00
Matthew Lugg 74931fe25c std.debug.lockStderrWriter: also return ttyconf
`std.Io.tty.Config.detect` may be an expensive check (e.g. involving
syscalls), and doing it every time we need to print isn't really
necessary; under normal usage, we can compute the value once and cache
it for the whole program's execution. Since anyone outputting to stderr
may reasonably want this information (in fact they are very likely to),
it makes sense to cache it and return it from `lockStderrWriter`. Call
sites who do not need it will experience no significant overhead, and
can just ignore the TTY config with a `const w, _` destructure.
2025-10-30 09:31:28 +00:00
Alex Rønne Petersen 767f28d7a6 Merge pull request #25733 from GasInfinity-Forks/x86_16-cpu_context
* fix: add `i86` cpu in `update_cpu_features`
* feat: add `x86_16` debug `cpu_context`
2025-10-30 01:41:32 +01:00
GasInfinity fca748ffba fix: add i86 cpu in update_cpu_features 2025-10-29 14:34:58 +01:00
Alex Rønne Petersen a7119d4269 remove all IBM AIX and z/OS support
As with Solaris (dba1bf9353), we have no way to
actually audit contributions for these OSs. IBM also makes it even harder than
Oracle to actually obtain these OSs.

closes #23695
closes #23694
closes #3655
closes #23693
2025-10-29 14:25:51 +01:00
Andrew Kelley 4a38d783e8 tools: eliminate dependency on std.SegmentedList 2025-09-19 16:40:00 -07:00
Alex Rønne Petersen 5e9e1fb0c8 std.Target: adjustments to LoongArch CPU models
* Remove the generic model; we already have generic_la32 and generic_la64 and
  pick appropriately based on bitness.
* Remove the loongarch64 model. We used this as our baseline for 64-bit, but it's
  actually pretty misleading and useless; it doesn't represent any real CPU and
  has less features than generic_la64.
* Add la64v1_0 and la64v1_1 models.
* Change our baseline CPU model for 64-bit to be la64v1_0, thus adding LSX to
  the baseline feature set.
2025-09-18 12:42:24 +02:00
Alex Rønne Petersen 978555eea4 std.Target.x86: purge avx10.n-256, rename avx10.n_512 to avx10.n, require evex512 for avx512f
Intel has abandoned AVX10.N/128,256; AVX10.N is now always 512-bit.
2025-08-30 06:36:41 +02:00
Alex Rønne Petersen 94f95fefe3 update_cpu_features: bump branch quota for amdgcn
/lib/std/Target/amdgcn.zig:1656:5: error: evaluation exceeded 1000 backwards branches
        for (&result, 0..) |*elem, i| {
        ^~~
2025-08-30 06:36:41 +02:00
Alex Rønne Petersen 5739ce786e update_cpu_features: fix a fmtId call to be fmtIdPU 2025-08-30 06:36:41 +02:00
Andrew Kelley 749f10af49 std.ArrayList: make unmanaged the default 2025-08-11 15:52:49 -07:00
Andrew Kelley 8c9dfcbd0f std.Io: remove BufferedWriter 2025-08-08 17:17:53 -07:00
Alex Rønne Petersen 2ffa63acef tools: fix some bitrot 2025-07-16 06:37:48 +02:00
Andrew Kelley d8e26275f2 update standalone and incremental tests to new API 2025-07-07 22:43:53 -07:00
Ali Cheraghi 1df79ab895 remove spirv cpu arch 2025-06-23 06:03:03 +02:00
Ali Cheraghi 4bf1e4d198 target: auto-generated spirv features 2025-05-21 15:26:18 +03:30
Alex Rønne Petersen 4de368a1b6 std.Target: Update CPU models/features for LLVM 20.
Closes #21818.
2025-04-04 06:08:09 +02:00
Ali Cheraghi d5e1cb3ea2 spirv: ziggify and remove unknown spirv features
`OpCapability` and `OpExtension` now can also be emitted from inline assembly
2025-02-18 18:08:47 +03:30
Alex Rønne Petersen 2fe32ef847 std.Target: Remove Cpu.Arch.propeller2 and use a CPU feature instead. 2025-02-17 19:17:55 +01:00
Alex Rønne Petersen 5248f0a909 update_cpu_features: Handle targets that don't have LLVM data. 2025-02-17 19:17:55 +01:00
Alex Rønne Petersen ea1502974d wasm: Add a nontrapping_bulk_memory_len0 feature.
This will mainly be used when targeting our wasm2c implementation which has no
problem with zero-length bulk memory operations, as a non-standard extension.
2025-01-22 20:56:28 +01:00
Alex Rønne Petersen 280ced66eb std.Target: Define and use lime1 as the baseline CPU model for WebAssembly.
See: https://github.com/WebAssembly/tool-conventions/pull/235

This is not *quite* using the same features as the spec'd lime1 model because
LLVM 19 doesn't have the level of feature granularity that we need for that.
This will be fixed once we upgrade to LLVM 20.

Part of #21818.
2025-01-22 03:01:05 +01:00
Jacob Young ac1a975f9b x86_64: implement clz and not 2025-01-16 20:42:08 -05:00
David Rubin f36f7d54a7 refactor update_cpu_features.zig
Most of this commit is whitespace changes, moving to use RLS
for assigning the `CpuModel`
2024-11-25 01:11:15 -08:00