Rahul
f5f3a05217
Lower Wasm f16x8.mul to AVX10.1 instruction VMULPH in Liftoff and Turboshaft when UseAvx10_1() is true. Add assembler and disassembler coverage, instruction-selector tests, and FP16 execution tests covering rounding, special values, and operand aliasing. Retain the existing x64 lowering paths as fallbacks when AVX10.1 is disabled or unavailable. Bug: 536954139 Change-Id: Ibf1721d54319c7b294acda5885360434f746853e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/8625836 Commit-Queue: Chaphalkar, Rahul S <rahul.s.chaphalkar@intel.com> Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Reviewed-by: Ryan Diaz <ryandiaz@chromium.org> Cr-Commit-Position: refs/heads/main@{#111246}