target/s390x: Update capstone disassembly to v6

In particular, this enables many more vector insns.

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson committed 2026-08-18 17:35:33 -07:00
1 parent 724452279f
commit c8220a096f
3 files changed
+13 -4

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+1 -1
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@@ -95,7 +95,7 @@ static cs_err cap_disas_start(disassemble_info *info, csh *handle)
(uintptr_t)&cap_skipdata_riscv);
break;
case CS_ARCH_SYSZ:
case CS_ARCH_SYSTEMZ:
cs_option(*handle, CS_OPT_SKIPDATA_SETUP,
(uintptr_t)&cap_skipdata_s390x);
break;
+9 -2
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@@ -4,7 +4,6 @@
#ifdef CONFIG_CAPSTONE
#define CAPSTONE_AARCH64_COMPAT_HEADER
#define CAPSTONE_SYSTEMZ_COMPAT_HEADER
#include <capstone.h>
#else
@@ -19,7 +18,6 @@
#define CS_ARCH_X86 -1
#define CS_ARCH_PPC -1
#define CS_ARCH_SPARC -1
#define CS_ARCH_SYSZ -1
#define CS_MODE_LITTLE_ENDIAN 0
#define CS_MODE_BIG_ENDIAN 0
@@ -84,6 +82,15 @@
#define CS_MODE_SH4A 0
#endif
#if CS_API_MAJOR == 0
#define CS_ARCH_SYSTEMZ -1
#elif CS_API_MAJOR < 6
#define CS_ARCH_SYSTEMZ CS_ARCH_SYSZ
#endif
#if CS_API_MAJOR < 6
#define CS_MODE_SYSTEMZ_ARCH14 0
#endif
#if CS_API_MAJOR < 5
#define CS_ARCH_TRICORE -1
#define CS_MODE_TRICORE_110 0
+3 -1
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@@ -225,10 +225,12 @@ static void s390_cpu_reset_hold(Object *obj, ResetType type)
static void s390_cpu_disas_set_info(const CPUState *cpu, disassemble_info *info)
{
info->mach = bfd_mach_s390_64;
info->cap_arch = CS_ARCH_SYSZ;
info->cap_arch = CS_ARCH_SYSTEMZ;
info->endian = BFD_ENDIAN_BIG;
info->cap_insn_unit = 2;
info->cap_insn_split = 6;
/* Disassemble everything, even if the cpu would trap on the insn. */
info->cap_mode = CS_MODE_SYSTEMZ_ARCH14;
}
static void s390_cpu_realizefn(DeviceState *dev, Error **errp)