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tcg: Drop division helpers
All current tcg hosts support division, so the helpers are no longer used. Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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3 files changed
+8
-62
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@@ -32,50 +32,6 @@
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#include "exec/helper-info.c.inc"
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#undef HELPER_H
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/* 32-bit helpers */
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int32_t HELPER(div_i32)(int32_t arg1, int32_t arg2)
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{
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return arg1 / arg2;
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}
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int32_t HELPER(rem_i32)(int32_t arg1, int32_t arg2)
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{
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return arg1 % arg2;
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}
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uint32_t HELPER(divu_i32)(uint32_t arg1, uint32_t arg2)
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{
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return arg1 / arg2;
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}
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uint32_t HELPER(remu_i32)(uint32_t arg1, uint32_t arg2)
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{
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return arg1 % arg2;
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}
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/* 64-bit helpers */
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int64_t HELPER(div_i64)(int64_t arg1, int64_t arg2)
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{
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return arg1 / arg2;
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}
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int64_t HELPER(rem_i64)(int64_t arg1, int64_t arg2)
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{
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return arg1 % arg2;
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}
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uint64_t HELPER(divu_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 / arg2;
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}
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uint64_t HELPER(remu_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 % arg2;
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}
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uint64_t HELPER(muluh_i64)(uint64_t arg1, uint64_t arg2)
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{
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uint64_t l, h;
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@@ -1,13 +1,3 @@
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DEF_HELPER_FLAGS_2(div_i32, TCG_CALL_NO_RWG_SE, s32, s32, s32)
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DEF_HELPER_FLAGS_2(rem_i32, TCG_CALL_NO_RWG_SE, s32, s32, s32)
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DEF_HELPER_FLAGS_2(divu_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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DEF_HELPER_FLAGS_2(remu_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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DEF_HELPER_FLAGS_2(div_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
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DEF_HELPER_FLAGS_2(rem_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
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DEF_HELPER_FLAGS_2(divu_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_2(remu_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_2(mulsh_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
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DEF_HELPER_FLAGS_2(muluh_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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+8
-8
@@ -619,7 +619,7 @@ void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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tcg_gen_op5_i32(INDEX_op_divs2, ret, t0, arg1, t0, arg2);
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tcg_temp_free_i32(t0);
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} else {
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gen_helper_div_i32(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -639,7 +639,7 @@ void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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tcg_gen_op5_i32(INDEX_op_divs2, t0, ret, arg1, t0, arg2);
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tcg_temp_free_i32(t0);
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} else {
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gen_helper_rem_i32(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -653,7 +653,7 @@ void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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tcg_gen_op5_i32(INDEX_op_divu2, ret, t0, arg1, zero, arg2);
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tcg_temp_free_i32(t0);
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} else {
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gen_helper_divu_i32(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -673,7 +673,7 @@ void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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tcg_gen_op5_i32(INDEX_op_divu2, t0, ret, arg1, zero, arg2);
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tcg_temp_free_i32(t0);
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} else {
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gen_helper_remu_i32(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -1547,7 +1547,7 @@ void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_op5_i64(INDEX_op_divs2, ret, t0, arg1, t0, arg2);
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tcg_temp_free_i64(t0);
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} else {
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gen_helper_div_i64(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -1567,7 +1567,7 @@ void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_op5_i64(INDEX_op_divs2, t0, ret, arg1, t0, arg2);
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tcg_temp_free_i64(t0);
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} else {
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gen_helper_rem_i64(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -1581,7 +1581,7 @@ void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_op5_i64(INDEX_op_divu2, ret, t0, arg1, zero, arg2);
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tcg_temp_free_i64(t0);
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} else {
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gen_helper_divu_i64(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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@@ -1601,7 +1601,7 @@ void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_op5_i64(INDEX_op_divu2, t0, ret, arg1, zero, arg2);
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tcg_temp_free_i64(t0);
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} else {
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gen_helper_remu_i64(ret, arg1, arg2);
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g_assert_not_reached();
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}
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}
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