65 Commits
Author SHA1 Message Date
Cullen Rhodes 4780eccb29 [LiveDebugValues] Return early from collectIDsForRegs for empty sets (NFC) (#232776)
Improves compile-time across all debug configurations.

CTMark results [1]:

- stage1-O0-g -0.40%
- stage1-aarch64-O0-g -0.48%
- stage2-O0-g -0.43%

[1] https://llvm-compile-time-tracker.com/compare.php?from=3afa38c6b8eac95660a4677b1353745c720212e5&to=f315b634ee03d2331f4812de2a0277d5ef91e918&stat=instructions:u

Assisted-by: codex
2026-10-19 08:52:41 +01:00
Mikołaj Piróg d6294c910a [NewPM] Sync passes names between legacy and NewPM (#229775)
This is done so that -stop-after/before will accept the same spelling
for both legacy and NewPM. Changed names:

livedebugvalues           ->   live-debug-values
virtregrewriter              ->  virt-reg-rewriter
twoaddressinstruction -> two-address-instruction
slotindexes                   -> slot-indexes
postrapseudos             -> post-ra-pseudos
processimpdefs            -> process-imp-def

(NewPM spelling was picked every time)
2026-10-07 21:24:12 +00:00
Adrian Prantl 7e1eafc576 [DebugInfo] Support global addresses in variable locations (#218722)
This patch adds support for global address locations to SelectionDAG,
GlobalISel and AsmPrinter. The actual implementation is very similar to
how constants are being handled so most code changes are very
mechanical.

The motivation for adding global address support is the Swift compiler
and it is needed even in unoptimized code. For example, the standard
libary implements the empty array with a global "empty array storage"
singleton object, so it can show up as the location of array values.
Another very common use-case are references to type metadata, which is
also accessed via global symbols.

It is even possible to motivate this with a C exmple:

  extern int g; int *p = &g;

also produces the dbg_value with a global value.

This patch adds an SDDbgOperand kind for a global address which gets
lowered to a MO_GlobalAddress DBG_VALUE operand, a DbgValueLocEntry, and
finally DW_OP_addrx/DW_OP_stack_value, similar to how global
DITemplateValueParameter are handled.

In AsmPrinter the address pool is preferred, its index is plain data
that both a DIE and the byte stream backing a location list can hold.
Before DWARF 5 the pool is only available under split DWARF, so fall
back to a relocated DW_OP_addr, which only a DIE can carry. Emit no
location at all when neither is possible.

Not handled are thread locals, which need DW_OP_form_tls_address,
dllimport, whose address requires a load from the import address table,
and ifuncs, whose symbol address is not the value of the pointer.

rdar://156549577
Assisted-by: Claude
2026-10-01 22:18:29 +00:00
Cullen Rhodes 9b0d277df1 [LiveDebugValues] Avoid SmallSet for dead registers (#195841)
transferRegisterDef builds a list of dead registers and removes open ranges for
debug locations that use those registers. This list used a SmallSet, so each
insert also does uniquing in the hot per-instruction path. This showed up under
SmallSet<Register, 32>::insertImpl on profiles of sqlite on aarch64-O0-g.

Using a SmallVector instead and uniquing in collectIDsForRegs improves
compile-time.

CTMark geomean:
- stage1-O0-g: -0.35%
- stage1-aarch64-O0-g: -0.72%
- stage2-O0-g: -0.27%

https://llvm-compile-time-tracker.com/compare.php?from=c9d713aa48a714d20b8502d06b9feb24829e6f22&to=6c0d4aafb9e325259c88577d148ac13c643ea993&stat=instructions%3Au

Assisted-by: codex
2026-05-06 05:43:26 +01:00
Cullen Rhodes 4e6d3722fc [LiveDebugValues] Use std::sort for register sorting in collectIDsForRegs (#194339)
VarLocBasedLDV::collectIDsForRegs sorts a SmallVector<Register> using
array_pod_sort which is a thin wrapper around qsort. That shows up as a hotspot
in compile-time profiles under __GI___qsort_r.

Switching this to an explicit-comparator llvm::sort call, which takes the
std::sort path instead improves compile-time with no change to code-size.

CTMark geomean:
- stage1-O0-g: -0.41%
- stage1-aarch64-O0-g: -0.58%
- stage2-O0-g: -0.40%

http://llvm-compile-time-tracker.com/compare.php?from=347aa3f6fbcc48cd752d02aa581b74c33d18dd41&to=cca8df56a576682510733c4c1b6fc12556e2dd7c&stat=instructions%3Au
2026-04-27 14:53:03 +01:00
Fateme Hosseini 02771a3eaf Fix insert DBG_VALUE after terminator Failure for Hexagon (#173401)
This patch fixes an assertion failure on VLIW targets like Hexagon,
where a packet can contain both a terminator and a spill/copy. The
existing code did not look inside bundles, hence, it could leave a
transfer anchored on a terminator. When LiveDebugValues later
attempted to insert a DBG_VALUE after that packet, it hit:

  Assertion `!TR.TransferInst->isTerminator() && "Cannot insert
DBG_VALUE after terminator"' failed

The change switches to instr_iterator and walks each packet with
getBundleStart/getBundleEnd. Packets containing a terminator are skipped
for insertion; non‑terminator ops in other packets are still processed
normally. This avoids illegal insertion points while keeping spill/copy
tracking intact.
2026-01-29 09:03:10 -06:00
Kazu Hirata 6bee6b2090 [CodeGen] Add "override" where appropriate (NFC) (#164571)
Note that "override" makes "virtual" redundant.

Identified with modernize-use-override.
2025-10-22 06:51:08 -07:00
Vladislav Dzhidzhoev 2d1f9c95d9 Reland "[DebugInfo][DwarfDebug] Separate creation and population of abstract subprogram DIEs" (#160786)
This is an attempt to reland
https://github.com/llvm/llvm-project/pull/159104 with the fix for
https://github.com/llvm/llvm-project/issues/160197.

The original patch had the following problem: when an abstract
subprogram DIE is constructed from within
`DwarfDebug::endFunctionImpl()`,
`DwarfDebug::constructAbstractSubprogramScopeDIE()` acknowledges `unit:`
field of DISubprogram. But an abstract subprogram DIE constructed from
`DwarfDebug::beginModule()` was put in the same compile unit to which
global variable referencing the subprogram belonged, regardless of
subprogram's `unit:`.

This is fixed by adding `DwarfDebug::getOrCreateAbstractSubprogramCU()`
used by both`DwarfDebug:: constructAbstractSubprogramScopeDIE()` and
`DwarfCompileUnit::getOrCreateSubprogramDIE()` when abstract subprogram
is queried during the creation of DIEs for globals in
`DwarfDebug::beginModule()`.

The fix and the already-reviewed code from
https://github.com/llvm/llvm-project/pull/159104 are two separate
commits in this PR.

=====
The original commit message follows:

With this change, construction of abstract subprogram DIEs is split in
two stages/functions: creation of DIE (in
DwarfCompileUnit::getOrCreateAbstractSubprogramDIE) and its population
with children (in
DwarfCompileUnit::constructAbstractSubprogramScopeDIE).

With that, abstract subprograms can be created/referenced from
DwarfDebug::beginModule, which should solve the issue with static local
variables DIE creation of inlined functons with optimized-out
definitions. It fixes https://github.com/llvm/llvm-project/issues/29985.

LexicalScopes class now stores mapping from DISubprograms to their
corresponding llvm::Function's. It is supposed to be built before
processing of each function (so, now LexicalScopes class has a method
for "module initialization" alongside the method for "function
initialization"). It is used by DwarfCompileUnit to determine whether a
DISubprogram needs an abstract DIE before DwarfDebug::beginFunction is
invoked.

DwarfCompileUnit::getOrCreateSubprogramDIE method is added, which can
create an abstract or a concrete DIE for a subprogram. It accepts
llvm::Function* argument to determine whether a concrete DIE must be
created.

This is a temporary fix for
https://github.com/llvm/llvm-project/issues/29985. Ideally, it will be
fixed by moving global variables and types emission to
DwarfDebug::endModule (https://reviews.llvm.org/D144007,
https://reviews.llvm.org/D144005).

Some code proposed by Ellis Hoag <ellis.sparky.hoag@gmail.com> in
https://github.com/llvm/llvm-project/pull/90523 was taken for this
commit.
2025-09-29 14:40:15 +02:00
Vladislav Dzhidzhoev 310811af6d Revert "[DebugInfo][DwarfDebug] Separate creation and population of abstract subprogram DIEs" (#160349)
Reverts llvm/llvm-project#159104 due to the issues reported in
https://github.com/llvm/llvm-project/issues/160197.
2025-09-23 19:44:34 +02:00
Vladislav Dzhidzhoev 432b58915a [DebugInfo][DwarfDebug] Separate creation and population of abstract subprogram DIEs (#159104)
With this change, construction of abstract subprogram DIEs is split in
two stages/functions:
creation of DIE (in DwarfCompileUnit::getOrCreateAbstractSubprogramDIE)
and its population with children (in
DwarfCompileUnit::constructAbstractSubprogramScopeDIE).
With that, abstract subprograms can be created/referenced from
DwarfDebug::beginModule, which should solve the issue with static local
variables DIE creation of inlined functons with optimized-out
definitions. It fixes https://github.com/llvm/llvm-project/issues/29985.

LexicalScopes class now stores mapping from DISubprograms to their
corresponding llvm::Function's. It is supposed to be built before
processing of each function (so, now LexicalScopes class has a method
for "module initialization" alongside the method for "function
initialization"). It is used by DwarfCompileUnit to determine whether a
DISubprogram needs an abstract DIE before DwarfDebug::beginFunction is
invoked.

DwarfCompileUnit::getOrCreateSubprogramDIE method is added, which can
create an abstract or a concrete DIE for a subprogram. It accepts
llvm::Function* argument to determine whether a concrete DIE must be
created.

This is a temporary fix for
https://github.com/llvm/llvm-project/issues/29985. Ideally, it will be
fixed by moving global variables and types emission to
DwarfDebug::endModule (https://reviews.llvm.org/D144007,
https://reviews.llvm.org/D144005).

Some code proposed by Ellis Hoag <ellis.sparky.hoag@gmail.com> in
https://github.com/llvm/llvm-project/pull/90523 was taken for this
commit.
2025-09-17 20:06:49 +02:00
Akshat Oke 6be6400848 [LiveDebugValues][NFC] Remove TargetPassConfig from LDVImpl (#131562)
TPC is only used to access the option `ShouldEmitDebugEntryValues`.
2025-03-18 11:04:54 +05:30
Kazu Hirata bcb0c3a291 [CodeGen] Avoid repeated hash lookups (NFC) (#129465) 2025-03-03 07:27:16 -08:00
Craig Topper b7eee2c3fe [CodeGen] Remove some implict conversions of MCRegister to unsigned by using(). NFC
Many of these are indexing BitVectors or something where we can't
using MCRegister and need the register number.
2025-01-19 13:18:04 -08:00
Kazu Hirata 735ab61ac8 [CodeGen] Remove unused includes (NFC) (#115996)
Identified with misc-include-cleaner.
2024-11-12 23:15:06 -08:00
William G Hatch 181840459d [LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)
This patch handles virtual registers in the VarLocBasedImpl of the
LiveDebugVariables pass, allowing it to be used on architectures that
depend on virtual registers in debugging, like NVPTX. It enables the
pass for NVPTX.
2024-10-08 19:38:47 -06:00
Kazu Hirata 22486e031d [LiveDebugValues] Avoid repeated hash lookups (NFC) (#109509) 2024-09-21 09:11:19 -07:00
Craig Topper cd3667d1db [CodeGen] Update a few places that were passing Register to raw_ostream::operator<< (#106877)
These would implicitly cast the register to `unsigned`. Switch most of
them to use printReg will give a more readable output. Change some
others to use Register::id() so we can eventually remove the implicit
cast to `unsigned`.
2024-09-02 00:19:19 -07:00
Kazu Hirata ca53611c90 [llvm] Use range-based for loops (NFC) (#105861) 2024-08-23 16:56:27 -07:00
Jay Foad 1650f1b3d7 Fix typo "indicies" (#92232) 2024-05-15 13:10:16 +01:00
DianQK 7649d22306 [AArch64] ORRWrs is copy instruction when there's no implicit def of the X register (#75184)
Follows
https://github.com/llvm/llvm-project/pull/74682#issuecomment-1850268782.
Fixes #74680.
2023-12-14 19:19:55 +08:00
Matt Arsenault f79379398d Revert "CodeGen: Disable isCopyInstrImpl if there are implicit operands"
This reverts commit bc7d88faf1.

This is broken with 414ff812d6 reverted.
2023-10-02 22:43:24 +03:00
Matt Arsenault bc7d88faf1 CodeGen: Disable isCopyInstrImpl if there are implicit operands
This is a conservative workaround for broken liveness tracking of
SUBREG_TO_REG to speculatively fix all targets. The current reported
failures are on X86 only, but this issue should appear for all targets
that use SUBREG_TO_REG. The next minimally correct refinement would be
to disallow only implicit defs.

The coalescer now introduces implicit-defs of the super register to
track the dependency on other subregisters. If we see such an implicit
operand, we cannot simply treat the subregister def as the result
operand in case downstream users depend on the implicitly defined
parts. Really target implementations should be considering the
implicit defs and trying to interpret them appropriately (maybe with
some generic helpers). The full implicit def could possibly be
reported as the move result, rather than the subregister def but that
requires additional work.

Hopefully fixes #64060 as well.

This needs to be applied to the release branch.

https://reviews.llvm.org/D156346
2023-10-02 15:16:40 +03:00
Jay Foad 5022fc2ad3 [CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.
Differential Revision: https://reviews.llvm.org/D151424
2023-06-01 19:17:34 +01:00
Wang, Xin10 fbb241c552 use ref to avoid copy in range for-loop
Use big obj copy in range for-loop will call copy constructor every time,
which can be avoided by use ref instead.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D150024
2023-05-28 22:24:21 -04:00
Luo, Yuanke ae1ca47bb4 [Coverity] Big parameter passed by value. 2023-05-05 09:50:38 +08:00
Kazu Hirata a585fa2637 [CodeGen] Use *{Set,Map}::contains (NFC) 2023-03-14 08:07:42 -07:00
Felipe de Azevedo Piovezan f753e5be82 [LiveDebugValues] Allow EntryValue with OP_deref expressions
With D68945, more DBG_VALUEs were created without the indirect operand,
instead relying on OP_deref to accomplish the same effect.

At the time, however, we were not able to handle arbitrary expressions
in combination with OP_LLVM_entry_value, so D71416 prevented the use of
such operation in the presence of expressions.

As per the comment in DIExpression::isValid, "we support only entry
values of a simple register location." As such, a simple deref operation
should be supported. In fact, D80345 added support for indirect
DBG_VALUEs.

Taken the patches above into consideration, this commit relaxes the
restrictions on which expressions are allowed for entry value
candidates: the expression must be either empty or a single dereference
operator.

This patch is useful for D141381, which adds support for storing the
address of ABI-indirect parameters on the stack.

Depends on D142160

Differential Revision: https://reviews.llvm.org/D142654
2023-01-31 09:39:08 -05:00
Craig Topper e72ca520bb [CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D141715
2023-01-13 14:38:08 -08:00
Heejin Ahn d198c75e5a [WebAssembly][LiveDebugValues] Handle target index defs
This adds the missing handling for defs for target index operands, as is
already done for registers.

There are two kinds of target indices: local indices and stack operands.

- Locals are something similar to registers in Wasm-land. For local
  indices, we can check for local-defining instructions (`local.set` or
  `local.tee`).

- Wasm is a stack machine, so we have values in certain Wasm value stack
  location, which change when Wasm instructions produce or consume
  values. So basically any value-producing instrucion, i.e., instruction
  with defs, can change values in the Wasm stack. But I think we don't
  need to worry about this here, because `WebAssemblyDebugFixup`, which
  runs right before this analysis, makes sure to insert terminating
  `DBG_VALUE $noreg` instructions whenever a stack value gets popped.
  After `WebAssemblyDebugFixup`, there shouldn't be any `DBG_VALUE`s for
  stack operands that don't have a terminating `DBG_VALUE $noreg` within
  the same BB.

So this CL only works on `DBG_VALUE`s for locals. When we encounter a
`local.set` or `local.tee` instructions, we delete `DBG_VALUE`s for
those target index locations from the open range set, so they will not
be availble in `OutLocs`. For example,
```
bb.0:
  successors: %bb.1
  DBG_VALUE target-index(wasm-local) + 2, $noreg, "var", ...
  ...
  local.set 2 ...

bb.1:
; predecessors: %bb.0
  ; We shouldn't add `DBG_VALUE target (wasm-local) + 2 here because
  ; it was killed by 'local.set' in bb.0
```

After disabling register coalescing at -O1, the average PC ranges
covered for Emscripten core benchmarks is currently 20.6% in the LLVM
tot. After applying D138943 and this CL, the coverage goes up to 57%.
This also enables LiveDebugValues analysis in the Wasm pipeline by
default.

Reviewed By: dschuff, jmorse

Differential Revision: https://reviews.llvm.org/D140373
2023-01-10 09:56:25 -08:00
Heejin Ahn e9ea7a0e20 [WebAssembly] Use LiveDebugValues analysis
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at
the end of a BB, and this is the analysis extends their lifetime when
possible, greatly increasing the coverage of variable debug info.

Specifically, this removes the current constraint that this analysis is
only used with physical registers, which was first introduced in D18421,
because Wasm uses only virtual registers. I don't think there's anything
inherent in this analysis that only applies to physical registers; it
was just because all targets using this analysis ran this at the end of
their compiliation pipeline, at which point all their vregs had been
allocated, and Wasm's debug info infrastructure was not really set up
yet, so it was not using it.

This adds supports to Wasm-specific target-index operands, defined in
https://github.com/llvm/llvm-project/blob/2166d9529a60d1cdedb733d2e4134c971f0969ec/llvm/lib/Target/WebAssembly/WebAssembly.h#L87-L100.
Among these, `TI_LOCAL`, `TI_LOCAL_INDIRECT`, and `TI_OPERAND_STACK` are
used by Wasm `DBG_VALUE` instructions.

This does not yet handle mutable target indices, i.e., this does not
terminate a `DBG_VALUE` for a local index when we encounter a new
`local.set` or `local.tee`. It will be implemented as a follow-up.

Reviewed By: dschuff, jmorse

Differential Revision: https://reviews.llvm.org/D138943
2023-01-10 09:54:59 -08:00
Heejin Ahn 4792ba5971 [LiveDebugValues] Remove LexicalScope param from VarLoc (NFC)
It doesn't seem to be used anymore.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D140258
2022-12-21 15:11:38 -08:00
Fangrui Song 67819a72c6 [CodeGen] llvm::Optional => std::optional 2022-12-13 09:06:36 +00:00
Krzysztof Parzyszek 0ca43d4488 DebugInfoMetadata: convert Optional to std::optional 2022-12-04 11:52:02 -06:00
Kazu Hirata 998960ee1f [CodeGen] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated.  The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-02 20:36:08 -08:00
Nathan James 6aa050a690 Reland "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 632a389f96.

This relands commit
1834a310d0.

Differential Revision: https://reviews.llvm.org/D137493
2022-11-08 14:15:15 +00:00
Nathan James 632a389f96 Revert "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 1834a310d0.
2022-11-08 13:11:41 +00:00
Nathan James 1834a310d0 [llvm][NFC] Use c++17 style variable type traits
This was done as a test for D137302 and it makes sense to push these changes

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D137493
2022-11-08 12:22:52 +00:00
Kazu Hirata 9e6d1f4b5d [CodeGen] Qualify auto variables in for loops (NFC) 2022-07-17 01:33:28 -07:00
Kazu Hirata 1eada2adda [CodeGen] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC) 2022-03-20 23:11:06 -07:00
serge-sans-paille 989f1c72e0 Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681
2022-03-16 08:43:00 +01:00
Nico Weber a278250b0f Revert "Cleanup codegen includes"
This reverts commit 7f230feeea.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10 07:59:22 -05:00
serge-sans-paille 7f230feeea Cleanup codegen includes
after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169
2022-03-10 10:00:30 +01:00
Kazu Hirata 3a8c51480f [CodeGen] Use = default (NFC)
Identified with modernize-use-equals-default
2022-02-06 10:54:44 -08:00
Kazu Hirata 2bea207d26 [CodeGen] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-01-30 12:32:51 -08:00
Kazu Hirata 3aed282257 [CodeGen] Use range-based for loops (NFC) 2021-12-03 20:45:59 -08:00
Kazu Hirata 1c35973c77 [llvm] Call *(Set|Map)::erase directly (NFC)
We can erase an item in a set or map without checking its membership
first.
2021-10-24 09:32:59 -07:00
Jeremy Morse a3936a6c19 [DebugInfo][InstrRef] Use PHI placement utilities for machine locations
InstrRefBasedLDV used to try and determine which values are in which
registers using a lattice approach; however this is hard to understand, and
broken in various ways. This patch replaces that approach with a standard
SSA approach using existing LLVM utilities. PHIs are placed at dominance
frontiers; value propagation then eliminates un-necessary PHIs.

This patch also adds a bunch of unit tests that should cover many of the
weirder forms of control flow.

Differential Revision: https://reviews.llvm.org/D110173
2021-10-13 12:49:04 +01:00
Jack Andersen bd4dad87f4 [MachineInstr] Move MIParser's DBG_VALUE RegState::Debug invariant into MachineInstr::addOperand
Based on the reasoning of D53903, register operands of DBG_VALUE are
invariably treated as RegState::Debug operands. This change enforces
this invariant as part of MachineInstr::addOperand so that all passes
emit this flag consistently.

RegState::Debug is inconsistently set on DBG_VALUE registers throughout
LLVM. This runs the risk of a filtering iterator like
MachineRegisterInfo::reg_nodbg_iterator to process these operands
erroneously when not parsed from MIR sources.

This issue was observed in the development of the llvm-mos fork which
adds a backend that relies on physical register operands much more than
existing targets. Physical RegUnit 0 has the same numeric encoding as
$noreg (indicating an undef for DBG_VALUE). Allowing debug operands into
the machine scheduler correlates $noreg with RegUnit 0 (i.e. a collision
of register numbers with different zero semantics). Eventually, this
causes an assert where DBG_VALUE instructions are prohibited from
participating in live register ranges.

Reviewed By: MatzeB, StephenTozer

Differential Revision: https://reviews.llvm.org/D110105
2021-10-07 16:08:52 +01:00
Marcelo Juchem dfb213c2df Fix ambiguous overload build failure
LLVM (llvmorg-14-init) under Debian sid using latest gcc (Debian
10.3.0-9) 10.3.0 fails due to ambiguous overload on operators == and !=:

/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:212:22:
error: ambiguous overload for 'operator!='
(operand types are 'llvm::ELFYAML::ELF_SHF' and 'int')

/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:204:32:
error: ambiguous overload for 'operator!='
(operand types are 'const llvm::yaml::Hex64' and 'int')

/root/src/llvm/src/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp:629:35:
error: ambiguous overload for 'operator=='
(operand types are 'const uint64_t' {aka 'const long unsigned int'} and
'llvm::Register')

Reviewed by: StephenTozer, jmorse, Higuoxing

Differential Revision: https://reviews.llvm.org/D109534
2021-10-01 14:19:57 +01:00
Simon Pilgrim 4af7643470 [CodeGen] LiveDebug - Use const-ref iterator in for-range loop. NFCI.
Avoid unnecessary copies, reported by MSVC static analyzer.
2021-09-17 14:04:54 +01:00