889 Commits
Author SHA1 Message Date
Graham Hunter b8c7ae0172 [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (#206047)
Building on top of the work to convert deinterleave + extend to tbl,
this PR will search for a reverse on the other side of binops that use
the extended value, which are themselves used in an fadd reduction. We
can then fold the reverse into the tbls and remove the reverse from the
loop.
2026-10-22 15:18:21 +00:00
dyslexicsteak 93fccabb4e [CodeGenPrepare] Drop poison-generating flags on extensions in optimizeExtUses (#234134)
`optimizeExtUses` rewrites uses of an extension's source in other blocks
to read `trunc` of the extension, which is only correct where the
extension isn't `poison`. A `zext nneg` can be valid only where it was
originally used, like behind a check that its source isn't negative. If
that check is one of the rewritten uses, it ends up reading `poison`,
and on `x86_64-pc-windows-msvc`, InstSimplify in WinEHPrepare's cleanup
folds it to true and causes a miscompile.

Drop the extension's poison-generating flags once a use has been
rewritten, like #72103 and #90382 did for similar cases in
`CodeGenPrepare`.

Fixes #234098.
2026-10-22 10:20:12 +02:00
Fangrui Song c249c7bab3 [CodeGenPrepare] Fold disjoint or into addressing modes (#233669)
The addressing-mode matcher only looks through `add`. When the address
is used in another block, the `or` is computed separately instead of
folding into the memory operand:

```
; before
leal    1(,%ecx,4), %ecx
movzbl  (%eax,%ecx), %eax
; after
movzbl  1(%ecx,%eax,4), %eax
```

Treat `or disjoint` like `add`.

InstCombine canonicalizes `add X, C` to `or disjoint X, C` when the
operands have no common set bits

LLM-aided
2026-10-21 01:43:58 -07:00
Kazu Hirata 06d62fc244 [IR] Rename BasicBlock::getFirstNonPHIOrDbg* (NFC) (#232604)
This patch renames the functions in BasicBlock as follows because they
no longer check for debug intrinsics:

- getFirstNonPHIOrDbg           -> getFirstNonPHIOrPseudoProbe
- getFirstNonPHIOrDbgOrLifetime -> getFirstNonPHIOrLifetime
- getFirstNonPHIOrDbgOrAlloca   -> getFirstNonPHIOrAlloca

This patch also drops the SkipPseudoOp parameter from
getFirstNonPHIOrPseudoProbe and getFirstNonPHIOrLifetime because every
caller uses the default value of true.

Note that all three functions still return iterators with the head bit
unset so that insertions at the returned position are placed after any
DbgRecords attached to that instruction.

Assisted-by: Antigravity
2026-10-16 07:33:22 -07:00
Jay Foad 8014cff797 [CodeGen] Do not check result of getTerminator. NFC. (#232749)
Since #189416 BasicBlock::getTerminator cannot return nullptr.
2026-10-16 14:27:45 +00:00
Fangrui Song 657f308836 [CodeGen,MC] Make CodeGenOptions and MCCLOptions per-context (#232365)
Follow-up to #232210: drop perContext = false from CodeGenOptions and
MCCLOptions.

* TargetPassConfig stores `Opts` as a member; a callDefaultCtor
  specialization replaces its default constructor.
* MCSchedModel::getResourceBufferSize takes the reservation station
  scale factor. llvm-mca passes it through mca::PipelineOptions to the
  ResourceManager and to its scheduler and timeline views. InstrBuilder
  and TargetSchedModel only distinguish sizes -1, 0, and 1, which
  scaling preserves, so they read the unscaled BufferSize.
2026-10-15 10:29:41 -07:00
Kazu Hirata 2b35fb9283 [IR] Remove Instruction::isDebugOrPseudoInst (NFC) (#231766)
This patch replaces Instruction::isDebugOrPseudoInst with
isa<PseudoProbeInst> at most call sites and drops the check altogether
where PseudoProbeInst is already handled or cannot occur.

Note that debug info is now represented with DbgRecord rather than
debug intrinsics outside the DirectX backend.  None of the callers are
in the DirectX backend, so the DbgInfoIntrinsic check is dead.

Assisted-by: Antigravity
2026-10-14 09:35:26 -07:00
whokeke f3653503a4 [CodeGenPrepare] Handle negative GEP offsets in splitLargeGEPOffsets (#227627)
CodeGenPrepare::splitLargeGEPOffsets collects GEP candidates with large
constant offsets and rebases them to a shared common base, but only for
positive offsets (`ConstantOffset > 0`). Negative far-offset accesses
are left with independent `SUBXri` base materializations per access,
giving them different base registers and preventing the
`LoadStoreOptimizer` from pairing them into `LDP/STP`.

Relax the gate to `ConstantOffset != 0`, and extend
`AArch64TargetLowering::getPreferredLargeGEPBaseOffset` to handle
negative offsets using the same `HighPart = MinOffset & ~0xfff` rebase
as positive ones. For negative `MinOffset`, `HighPart` is the next lower
4096-aligned address, so all residuals (`Offset - HighPart`) are
non-negative and fit `LDR/STR`'s 12-bit unsigned scaled immediate. When
the residual also falls within `LDP/STP`'s 7-bit pairing range, `LSO`
pairs directly; otherwise `LSO`'s base-adjust (#223684) folds in an
extra `ADDXri` (or merges it into a preceding `SUBXri`/`ADDXri` when
adjacent), recovering the same instruction count as a direct rebase to
`MinOffset`.

This subsumes the MIR-level `shareBaseAddresses` pass (#223682) for the
negative-offset case, doing the equivalent work earlier at IR level. It
also benefits cases where LDP pairing isn't possible (non-adjacent
siblings) — the shared base alone saves instructions via CSE, which a
per-BB MIR-level pass can't do.

Example (from https://godbolt.org/z/sjo8eMW6j, 3 non-adjacent
negative-offset siblings, no LDP pairing):
; Before (upstream/main):
mov x8, #-4
mov x9, #-64
mov x10, #-1024
movk x8, #65531, lsl #16
movk x9, #65531, lsl #16
movk x10, #65531, lsl #16
ldr w8, x0, x8
ldr w9, x0, x9
ldr w10, x0, x10
; 9 instructions

; After (this patch):
sub x8, x0, #65, lsl #12   ; =266240
ldr w9, [x8, #4092]
ldr w10, [x8, #4032]
ldr w8, [x8, #3072]
; 4 instructions vs 9

Testing:
- Full AArch64 CodeGen test suite with assertions enabled (4301 tests, 0
regressions; 2 pre-existing upstream failures in
`arm64-codegen-prepare-extload.ll` and `and-sink.ll`, unrelated to this
change)
- `llvm-test-suite` (3535 passed, 0 failures, 0 errors)
- Bootstrap: building the entire LLVM+Clang with the patched clang
(assertions on, no crashes)

Note: `AArch64` is the only target that overrides
`shouldConsiderGEPOffsetSplit` and `getPreferredLargeGEPBaseOffset`, so
the gate change only affects AArch64 in practice.

Assisted-by: Claude (OpenCode)
2026-10-11 13:35:31 +00:00
Nikita Popov b87aa6ed3b [IRBuilder] Drop redundant BB argument for insert point ctor (#229052)
Add new constructor overloads that accept just an insertion point
iterator, without the redundant basic block argument. The overload with
the basic block will be deprecated in a followup.

This is #228476, but for the constructor instead of `SetInsertPoint()`.

Mass replacement was AI assisted.
2026-10-05 13:40:08 +00:00
Fangrui Song 57bb102107 [CodeGenPrepare] Prefix option names with cgp- (#228838)
Rename the CodeGenPrepare options so that they start with cgp-, and turn
the -disable-* options into positive options that default to true:

The section prefix options (-profile-guided-section-prefix, etc.) are
kept for now.

Aided by Opus 5.5
2026-10-04 13:40:33 -07:00
Fangrui Song f54e5523aa [CodeGen] Declare command line options in TableGen (#228911)
Move the cl::opts of TargetPassConfig.cpp and CodeGenPrepare.cpp into
CodeGenOptions.td, private to lib/CodeGen; other files will follow.
-enable-machine-outliner (cl::ValueOptional) and -regalloc
(RegisterPassParser) stay cl::opt.

CodeGenPrepare and its addressing-mode helpers hold
`const CodeGenOptions &Opts`; TargetPassConfig functions read
CodeGenOptions::Global. getCGPassBuilderOption() converts BoolOrDefault
members to the cl::boolOrDefault and std::optional<bool> fields of the
public CGPassBuilderOption. -basic-block-section-match-infer, which was
not cl::Hidden, is now listed by -help-hidden only.

Aided by Opus 5.5
2026-10-04 09:09:28 -07:00
Nikita Popov 67910b29d2 [IRBuilder] Use SetInsertPoint without redundant BasicBlock argument (#228476)
Replace calls of `SetInsertPoint(BB, It)` with just
`SetInsertPoint(It)`. In preparation for deprecating that overload.
2026-10-03 11:08:13 +00:00
Nikita Popov 530bcc3472 [llvm] Pass insertion point directly to IRBuilder ctor (NFC) (#228019)
Pass insertion point directly to the ctor instead of calling
SetInsertPoint(). Also remove redundant SetCurrentDebugLocation()
calls, which SetInsertPoint() already does.
2026-10-01 10:59:54 +00:00
Kazu Hirata 6b9d37acbd [CodeGen] Remove unused InstructionMoveBefore (NFC) (#227586)
The last use was removed on December 15, 2023 in commit
163aeca33d.

Assisted-by: Antigravity
2026-09-30 09:57:54 -07:00
ʟᴜɴᴇx 73a0b12b8e [CodeGenPrepare] don't promote sdiv/srem by -1 (#218737)
`store-extract` promotion was widening sdiv/srem to the vector type
without checking if thats safe or not... and INT_MIN lane / -1 is UB.
skip sdiv/srem by -1 in `shouldPromote`, rest still promotes fine.

Fixes #218570
2026-09-30 07:58:34 +00:00
Matt ArsenaultandClaude 7cb518a5a1 TargetMachine: Remove pointer-size query methods (#226404)
Remove the shim methods from the TargetMachine's copy of the DataLayout, 
which will soon be eliminated. The Module owns the authoritative DataLayout, 
so callers should read the value from the contextual Module.

Completely unreasonably, Mips's ABI name can change the pointer size which
we probably should just not support. Many other triple checks will never be 
correct. This avoids potential mismatches in these contexts, but I still expect
this to be widely broken.

Some of the TargetLowering constructor changes and AMDGPULegalizerInfo
changes are kind of annoying. We could pass in the DataLayout through the 
subtarget constructors but it didn't seem worth the effort and the information 
should be derivable from the triple anyway.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
2026-09-28 09:12:28 +02:00
Nikita Popov e56c2cefc3 [IR] Remove llvm.strip.invariant.group intrinsic (#225399)
This intrinsic was originally introduced to make sure that if we have a
dominating condition like `a == launder.invariant.group(a)`, we don't
end up replacing the latter with the former, as that would allow the
optimizer to assume that the memory stays invariant, despite going
through a launder operation. Wrapping both comparison operands in
strip.invariant.group avoids the issue, because replacing one stripped
pointer with another is safe.

The underlying issue was fixed in
https://github.com/llvm/llvm-project/pull/224281 (and prior work), which
ensures that the problematic replacement cannot happen in the first
place.

https://github.com/llvm/llvm-project/pull/225072 stopped emitting
llvm.strip.invariant.group on the clang side.

This PR now removes the intrinsic entirely. To be on the safe side, it
is upgraded to llvm.launder.invariant.group. For Clang's specific usage,
just dropping it would be fine.
2026-09-23 10:46:16 +02:00
Nikita Popov ce4f831c9e [CGP] Clear poison generating flags when freezing icmp of constants (#223326)
Followup to https://github.com/llvm/llvm-project/pull/222314. That
PR only dropped the flags for the case where a new freeze instruction
was created, but of course we also need to do this if both operands
are constant and the freeze is dropped entirely.
2026-09-14 09:14:02 +00:00
Nikita Popov 87af62fcd0 [CGP] Drop poison generating flags when pushing freeze through cmp (#222314)
We need to clear the samesign flag when pushing freeze through icmp.

In the last commit, I also adjusted the handling of FMF on fcmp to work
the same way -- previously the transform would be skipped instead if the
fcmp had fast math flags. I think just clearing the poison-generating
flags is preferable (and what we'd do anyway in InstCombine and
DAGCombine).

Fixes https://github.com/llvm/llvm-project/issues/222309.
2026-09-09 16:44:37 +02:00
Eli Friedman f6c89fda0a Add Instruction::user_iterator. (#220391)
Users of an Instruction have a special property: they're guaranteed to
be Instructions themselves. Add a specialized iterator to take advantage
of this property.

See the change to IVDescriptors.cpp for an example of how this
simplifies code.
2026-09-08 10:40:50 -07:00
黃國庭 792023c3e4 [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (#207568)
FIX #179950 

Extracted the core logic from CodeGenPrepare.cpp into a new optimizeBitCast function.

I have also included tests covering both legal and illegal types.
2026-09-04 10:51:34 +00:00
Karthik Senthil 047535cd19 [CodeGenPrepare] Use make_early_inc_range to avoid iterator invalidation. (#215347)
While iterating users of a {s|z}ext's source operand in optimizeExtUses
we explicitly replace the use with a trunc instruction thereby
invalidating iterator of the loop. Update the loop to use
make_early_inc_range to avoid invalidation.
2026-08-28 12:49:10 +02:00
Kito Cheng 3cbe66ab5e [TLI] Return LibFunc from TargetLibraryInfo::getLibFunc (#217561)
getLibFunc returned a bool and wrote the result to a LibFunc output
argument, which is only set when the lookup succeeds. Callers that
ignored the result read an uninitialized LibFunc, and a few in-tree
callers did exactly that.

Return the LibFunc instead, and NotLibFunc when the name is not a known
library function, so there is no way to get an uninitialized value out
of it.

Assisted-by: Opus
2026-08-20 22:28:37 +08:00
Ralender 21504f4ea7 [CodeGenPrepare] Maintain BranchProbabilityInfo up-to-date in bypassSlowDivision (#212058)
The test case crashes on the release/23.x. What happens is the
`BranchProbabilityInfo` becomes outdated because of a change of CFG in
`bypassSlowDivision` but no update to `BranchProbabilityInfo`.
So when it arrives to `SplitIndirectBrCriticalEdges` and hit the assert
in `setEdgeProbability`, because the Branch probabilities no-longer make
sense.
2026-08-18 19:14:30 +02:00
Alexis EngelkeandFangrui Song 206e4c0549 [Analysis] Use CycleInfo for BlockFrequencyInfo (#213488)
BranchProbabilityAnalysis uses CycleInfo, but BFI doesn't, causing the
somewhat redundant construction of an extra LoopInfo. Avoid this by
porting BFI to use CycleInfo.

This requires a minor change to the BFI implementation to avoid
incorrect results with irreducible loops that show up as nested but
don't show up as nested loops -- such cycle entries are skipped now.
(Such an entry heads a loop the cycle absorbed, and which entry keeps a
nested cycle of its own depends on the order the search found the entries
in.) @crossloops reaches c1 and c2 alike, yet only c1 heads a nested cycle,
so seeding it gave c1 a loop scale c2 never got and their frequencies came
out 0.68571 and 1.1429 where the test derives 1.0 for both. Represent none
of those entries and leave the region to computeIrreducibleMass, which
decomposes it from the reverse postorder as it does when LoopInfo finds
no natural loop there.

Passing the parent down also fixes the loop nest: &Loops.back() is whichever
loop was created last, not the enclosing one, and every crash on this branch
came from that.

Co-authored-by: Fangrui Song <i@maskray.me>
2026-08-05 10:21:50 +00:00
Fangrui Song 022bf7ba97 [LoopInfo] Take no dominator tree in verify(). NFC (#212414)
Similar to the recent change that makes analyze() lazy in building
DomTree.
2026-07-28 07:08:11 +00:00
Alexis Engelke 35d69e3fe3 [Analysis] Use CycleInfo for BranchProbabilityInfo (#210301)
Instead of computing a cycle info (SccInfo) internally in
BranchProbabilityInfo, use CycleInfo and remove the use of LoopInfo.
After recent improvements to CycleInfo, the extra analysis is cheaper
than computing the same information internally.

Replacing LoopInfo with CycleInfo has some impliciation that the
loop/cycle forest can differ if the header of an irreducible loop (which
is ignored by loop info) also happens to be the header of a different
natural loop. (Simple example: S -> A, B; A -> A, B; B -> A, B --
LoopInfo will find {{A}, {B}}; CycleInfo will find {A, {B}}].) In these
cases, the default weights will differ.

This change also makes the handling of entering/exiting edges
consistent between reducible and irreducible loops, therefore,
there are also minor changes for reducible CFGs.
2026-07-21 18:05:57 +00:00
Florian Hahn 25a5b7869c [PatternMatch] Add capturing m_Phi matcher (NFC) (#208949)
Add a new capturing m_Phi matcher and use it in some patterns instead of
manually casting/checking if operand is a phi.

PR: https://github.com/llvm/llvm-project/pull/208949
2026-07-12 09:39:05 +00:00
Jolyon dd37265910 [CodeGenPrepare] Cache known-live PHIs when deleting dead PHI chains (#207191)
This patch fixes a compile-time issue in CodeGenPrepare for huge
functions.

`DeleteDeadPHIs` may repeatedly prove overlapping PHI chains non-dead.
For very large functions, many PHIs can share the same non-dead def-use
suffix, causing the same suffix to be scanned many times.

Add an `KnownNonDeadPHIs` cache to `RecursivelyDeleteDeadPHINode`
and `DeleteDeadPHIs`. When a chain is proven non-dead, visited PHIs are
recorded so later queries can stop once they reach one of them.

This reduces the pathological CodeGenPrepare case from ~30mins to ~30s.
2026-07-08 12:09:24 +02:00
Justin Lebar 00b4695f1d [CodeGenPrepare] Use recomputed split-branch weights. (#199822)
splitBranchCondition computes new branch weights after splitting an
and/or condition into two branches, but then passed the original weights
to createBranchWeights at each metadata update. The recomputed values
were discarded.

Pass the scaled NewTrueWeight/NewFalseWeight values when installing
metadata on both generated branches.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
2026-05-27 21:51:12 +00:00
Justin LebarandClaude Opus 4.7 50a110ace7 [CodeGenPrepare] splitMergedValStore: don't split atomic stores. (#199592)
splitMergedValStore notices when you do e.g.

    z = x | (y << 32)
    store z

and may split this up into 32-bit two stores, of x and y, depending
e.g. on the type of x and y.

It skips this optimization for volatile stores, but currently does NOT
skip it for atomics (!!).  So an atomic store can be split up into two
(non-atomic!) stores.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-25 20:56:10 -07:00
Justin Lebar 133ad80cd8 [CodeGenPrepare] Report an error if ProfileSummaryAnalysis is not available (#199268)
CodeGenPreparePass can't declare ProfileSummaryAnalysis as required,
because PSA is a module-level analysis, but CFP is a function-level pass.
Therefore it accesses PSA using getCachedResult, and PSA might be null.

In practice this doesn't happen, because the CGP pass pipeline
preparation code ensures that PSA is present. But if you invoke
CGP via opt -passes=codegenprepare, then it's not
there, and we segfault.

Fix for https://github.com/llvm/llvm-project/issues/173360.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
2026-05-24 10:58:51 -07:00
Fangrui Song 0a181a1c0a Use auto for DenseMap/SmallDenseMap iterator variables. NFC (#196883)
To match the prevailing style.
2026-05-11 07:20:21 +00:00
Simon Pilgrim 4153b05958 [PatternMatch] Add m_Ctpop / m_Ctlz / m_Cttz matchers (#195520) 2026-05-03 13:08:37 +00:00
Mirko 2d84862fb3 [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (#193488)
Fixes #193487.

Drop nuw if unmerging would result in gep with a negative index.
2026-04-23 15:20:33 +00:00
Vitaly Buka e80f32fd20 [CodeGenPrepare] Use Instruction::comesBefore instead of manual ordering (#190485)
After #172329, we noticed that some sources compiled with MSan take
1000x longer to compile. This is caused by quadratic complexity in
tryToSinkFreeOperands, which can be called on a significant number
of instructions within huge basic blocks.

This inefficiency was introduced in 9cfa9b4, which manually iterates
and creates a DenseMap of entire basic blocks for each interesting
instruction.

This patch avoids the manual ordering by using
Instruction::comesBefore(), which provides the exact same
ordering much more efficiently.
2026-04-06 21:02:16 -07:00
Mingjie Xu 227edfb2f4 [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (#179040)
The original differential revision is https://reviews.llvm.org/D153638

Reverted in
https://github.com/llvm/llvm-project/commit/f5b5a30858f32e237636acd296b6d0f87c1dfe97
because of causing a clang crash.

This patch relands it with the crash fixed. Call `DTU->flush()` in each
iteration of `while (MadeChange)`
loop, flush all awaiting BasicBlocks deletion, and prevent iterator
invalidation.
2026-03-31 09:01:11 +08:00
Demetrius Kanios 351501799a [CodeGen] Improve getLoadExtAction and friends (#181104)
Alternative approach to the same goals as #162407

This takes `TargetLoweringBase::getLoadExtAction`, renames it to
`TargetLoweringBase::getLoadAction`, merges `getAtomicLoadExtAction`
into it, and adds more inputs for relavent information (alignment,
address space).

The `isLoadExtLegal[OrCustom]` helpers are also modified in a matching
manner.

This is fully backwards compatible, with the existing `setLoadExtAction`
working as before. But this allows targets to override a new hook to
allow the query to make more use of the information. The hook
`getCustomLoadAction` is called with all the parameters whenever the
table lookup yields `LegalizeAction::Custom`, and can return any other
action it wants.
2026-03-17 23:40:19 -07:00
Alexis Engelke 211279d11c [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (#186651)
BranchProbabilityInfo will compute it's own dominator tree and
post-dominator tree if none is specified; avoid this by using the
analysis manager/pass manager to get the analysis, which will reuse the
previously computed DomTree.
2026-03-15 17:41:22 +01:00
Alexis Engelke 01571f1b4a [CodeGen] Drop uses of BranchInst (#186391)
Largely a straight-forward replacement with occasional simplifcations.

For AMDGPU, I assumed that unconditional branches are always uniform and
therefore "simplified"/changed AMDGPUAnnotateUniformValues to only
annotate conditional branches.

Target-specific FastISel only selects conditional branches,
unconditional branches are already handled by the non-target-specific
code.
2026-03-13 21:51:38 +00:00
Alexis Engelke 4fd826d1f9 [IR] Split Br into UncondBr and CondBr (#184027)
BranchInst currently represents both unconditional and conditional
branches. However, these are quite different operations that are often
handled separately. Therefore, split them into separate opcodes and
classes to allow distinguishing these operations in the type system.
Additionally, this also slightly improves compile-time performance.
2026-03-11 12:31:10 +00:00
Wang Yaduo ee9aeb4e05 [NFC] Fix typos 'bicast' -> 'bitcast' (#180890)
Fix typos bicast -> bitcast. I find this when I'm resovling a codegen
prepare optimazation.
2026-02-15 18:47:34 +08:00
Mingjie Xu 28a0cfa946 Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (#179392)
https://github.com/llvm/llvm-project/pull/178895 caused a clang
crash(see https://lab.llvm.org/buildbot/#/builders/210/builds/8229),
reverted in 6d52d2683c.

The crash is assertion `DT && "DT should be available to update
LoopInfo!"' failed.

https://github.com/llvm/llvm-project/blob/ad8d5349d46734826aaeae4a2ebdc6f427a5bad8/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp#L1106

```
 #7 0x00007f5a380254e3 __assert_perror_fail (/usr/lib/libc.so.6+0x254e3)
 #8 0x0000563df5d8fde1 UpdateAnalysisInformation(llvm::BasicBlock*, llvm::BasicBlock*, llvm::ArrayRef<llvm::BasicBlock*>, llvm::DomTreeUpdater*, llvm::DominatorTree*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, bool, bool&) BasicBlockUtils.cpp:0:0
 #9 0x0000563df5d8f3bb llvm::splitBlockBefore(llvm::BasicBlock*, llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true, llvm::BasicBlock>, false, false>, llvm::DomTreeUpdater*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, llvm::Twine const&)
#10 0x0000563df5d8cb08 llvm::SplitEdge(llvm::BasicBlock*, llvm::BasicBlock*, llvm::DominatorTree*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, llvm::Twine const&)
#11 0x0000563df4ff5b59 (anonymous namespace)::CodeGenPrepare::splitLargeGEPOffsets()::$_1::operator()(long, llvm::Value*, llvm::GetElementPtrInst*) const CodeGenPrepare.cpp:0:0
#12 0x0000563df4fc0ec8 (anonymous namespace)::CodeGenPrepare::_run(llvm::Function&) CodeGenPrepare.cpp:0:0
#13 0x0000563df4fbb36c (anonymous namespace)::CodeGenPrepareLegacyPass::runOnFunction(llvm::Function&) CodeGenPrepare.cpp:0:0
```

I think this happened when we get DominatorTree with `DT.get()` in
`splitLargeGEPOffsets()` but `DT.reset()` already setting it to nullptr
in
https://github.com/llvm/llvm-project/blob/ad8d5349d46734826aaeae4a2ebdc6f427a5bad8/llvm/lib/CodeGen/CodeGenPrepare.cpp#L660.
To fix this assertion failure, use `getDT()` for
`splitLargeGEPOffsets()` to build the DominatorTree if it is set to
nullptr by `DT.reset()`.

I don't have a RSIC-V environment, so no reproducer. Checked that the
crash is fixed by rerunning buildbot with this patch
https://lab.llvm.org/buildbot/#/builders/210/builds/8248
2026-02-03 22:38:41 +08:00
Nikita Popov fd1e37b653 [IR] Remove Before argument from splitBlock APIs (NFC) (#179195)
We never need to use this conditionally (and it doesn't really make
sense, as the behavior is substantially different). Force the use of
separate APIs instead of a boolean argument.
2026-02-02 10:50:58 +00:00
Jameson Nash d10b2b566a [NFCI] replace getValueType with new getGlobalSize query (#177186)
Returns uint64_t to simplify callers. The goal is eventually replace
getValueType with this query, which should return the known minimum
reference-able size, as provided (instead of a Type) during create.
Additionally the common isSized query would be replaced with an
isExactKnownSize query to test if that size is an exact definition.
2026-01-22 13:55:53 -05:00
nataliakokoromyti fa0071baab [CodeGenPrepare] Fix infinite loop with same-type bitcasts (#176694)
OptimizeNoopCopyExpression was sinking same-type bitcasts (e.g. bitcast
i32 to i32) which would then be reintroduced by optimizePhiType, causing
an infinite loop.

Fix by adding a check (PhiTy == ConvertTy) in optimizePhiType to skip
the conversion when types are already identical.

Fixes #176688.
2026-01-22 09:29:08 +01:00
Rahul Joshi 26f962465e [LLVM][CodeGen] Remove pass initialization calls from pass constructors (#173061)
- Remove pass initialization calls from pass constructors.
- For some passes, add the initialization to `initializeCodeGen` or
`initializeGlobalISel`.
- Remove redundant initializations from llc and X86 target for some
passes.
2026-01-21 08:44:51 -08:00
Jameson NashandClaude Opus 4.5 ba2bd3fbba Use AllocaInst::getAllocationSize instead of manual size calculations (#176486)
Replace patterns that manually compute allocation sizes by multiplying
getTypeAllocSize(getAllocatedType()) by the array size with calls to the
getAllocationSize(DL) API, which handles this correctly and concisely,
returning nullopt for VLAs.

This fixes several places that were not accounting for array allocations
when computing sizes, simplifies code that was doing this manually, and
adds some explicit isFixed checks where implied convert was being used.

This PR is because now that we have opaque pointers, I hate that some
AllocaInst still has type information being consumed by some passes
instead of just using the size, since passes rarely handle that type
information well or correctly. I hope this will grow into a sequence of
commits to slowly eliminate uses of getAllocatedType from AllocaInst.
And similarly later to remove type information from GlobalValue too (it
can be replaced with just dereferenceable bytes, similar to arguments).

Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-19 09:55:52 -05:00
David Green a4975a8089 [CGP][AArch64] Do not sink instructions that might read/write memory. (#176182)
The test case's call instruction was being sank past the point where the
memory
it accessed was valid. Add a check that CGP does not try to sink
instruction that
might be invalid to move.

Fixes #176095
2026-01-18 14:18:25 +08:00
Antonio Frighetto 0456bcdd8d [CGP] Refactor tail call eligibility checks in dupRetToEnableTailCallOpts (NFC)
Tail call eligibility and profitability checks have been combined
into a single helper to reduce code duplication.
2026-01-16 12:36:43 +01:00