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Nazim Amirul 093da48782 fpga: altera-cvp: Retry teardown and reset CVP state on failure
The driver polls CFG_RDY for 0 as notification that the endpoint has
finished teardown and a new session can start safely. After a bad
bitstream that poll can time out: CFG_RDY may stay stuck when
HIP_CLK_SEL=0 if the device has already left usermode before the poll.

Retrying teardown alone is not enough. Exit CvP mode and switch the HIP
clock that feeds CFG_RDY so CVP_STATUS becomes responsive again, then
try the teardown once more.

Introduce altera_cvp_recovery() to wrap this cleanup and single retry.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20260923053233.10890-3-muhammad.nazim.amirul.nazle.asmade@altera.com
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
2026-09-29 18:23:46 +08:00
..
2021-07-21 19:54:21 -07:00