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Ivan Vecera
0748e473b6
The P-pin and N-pin of an output share the divisor, clock type, eSync and phase compensation registers (outside N-divided mode). Changing them through one pin changes the other pin too, but only the requested pin gets a change notification. Add zl3073x_dpll_output_pin_sibling_get() and notify the sibling from frequency_set(), esync_set() and phase_adjust_set(). The notification re-enters the pin get callbacks, so it has to be sent after zldpll->lock is released and the callbacks switch from guard(mutex) to explicit unlocking. To always find a registered sibling, add a pin to zldpll->pins before dpll_pin_register() and remove it only after dpll_pin_unregister(), both under zldpll->lock. A pin that is on the list but not registered gets no netlink notification, as dpll_pin_event_send() skips such pins, and the only in-tree DPLL notifier ignores DPLL_PIN_CHANGED. Found by code inspection, not triggered at runtime. Fixes:634ca2cb06("dpll: zl3073x: Add support to get/set esync on pins") Fixes:ce26d7ca50("dpll: zl3073x: Add support to get/set frequency on pins") Fixes:6287262f76("dpll: zl3073x: Add support to adjust phase") Reviewed-by: Petr Oros <poros@redhat.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20261011061211.448373-6-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>